IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 176

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

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Table 6–11. Deinterlacer Signals (Part 2 of 4)
Video and Image Processing Suite User Guide
din_startofpacket
din_valid
dout_data
dout_endofpacket
dout_ready
dout_startofpacket
dout_valid
ker_writer_control_av_address
ker_writer_control_av_chipselect
ker_writer_control_av_readdata
ker_writer_control_av_waitrequest
ker_writer_control_av_write
ker_writer_control_av_writedata
ma_control_av_address
ma_control_av_chipselect
ma_control_av_readdata
ma_control_av_waitrequest
ma_control_av_write
Signal
Direction
In
In
Out
Out
In
Out
Out
In
In
Out
Out
In
In
In
In
Out
Out
In
din port Avalon-ST startofpacket signal. This signal
marks the start of an Avalon-ST packet.
din port Avalon-ST valid signal. This signal identifies the
cycles when the port should input data.
dout port Avalon-ST data bus. This bus enables the
transfer of pixel data out of the MegaCore function.
dout port Avalon-ST endofpacket signal. This signal
marks the end of an Avalon-ST packet.
dout port Avalon-ST ready signal. The downstream device
asserts this signal when it is able to receive data.
dout port Avalon-ST startofpacket signal. This signal
marks the start of an Avalon-ST packet.
dout port Avalon-ST valid signal. The MegaCore function
asserts this signal when it outputs data.
ker_writer_control slave port Avalon-MM address
bus. This bus specifies a word offset into the slave address
space.
ker_writer_control slave port Avalon-MM
chipselect signal. The ker_writer_control port
ignores all other signals unless you assert this signal.
ker_writer_control slave port Avalon-MM readdata
bus. The MegaCore function uses these output lines for
read transfers.
ker_writer_control slave port Avalon-MM
waitrequest signal.
ker_writer_control slave port Avalon-MM write
signal. When you assert this signal, the
ker_writer_control port accepts new data from the
writedata bus.
ker_writer_control slave port Avalon-MM writedata
bus. The MegaCore function uses these input lines for write
transfers.
ma_control slave port Avalon-MM address bus. This bus
specifies a word offset into the slave address space.
ma_control slave port Avalon-MM chipselect signal.
The ma_control port ignores all other signals unless you
assert this signal.
ma_control slave port Avalon-MM readdata bus. The
MegaCore function uses these output lines for read
transfers.
ma_control slave port Avalon-MM waitrequest signal.
ma_control slave port Avalon-MM write signal. When
you assert this signal, the ma_control port accepts new
data from the writedata bus.
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Description
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May 2011 Altera Corporation
Chapter 6: Signals
Deinterlacer
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