IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 162

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–78
Latency
Table 5–28. Latency Summary (Part 1 of 2)
Video and Image Processing Suite User Guide
MegaCore Function
2D FIR Filter
2D Median Filter
Alpha Blending Mixer
Chroma Resampler
Clipper
Switch
Test Pattern Generator
On receiving an early endofpacket signal at the end of an input line, the Scaler II stalls
its input but continues writing data until it has sent on further output line. On
receiving an early endofpacket signal part way through an input line, the Scaler II
stalls its input for as long as it would take for the open input line to complete,
completing any output line that may accompany that input line. It then continues to
stall the input, and writes one further output line. If it does not receive an
endofpacket signal at the end of a frame, the Scaler II discards data until the end-of-
packet is found.
The Switch MegaCore function only stalls its inputs when performing an output
switch. Before switching its outputs it synchronize all its inputs and during this
synchronization the inputs may be stalled.
All modes of the Test Pattern Generator stall for a few cycles after a field, after a
control packet, and between lines. When producing a line of image data, the Test
Pattern Generator outputs one sample on every clock cycle, but it can be stalled
without consequences if other functions down the data path are not ready and exert
backpressure.
Table 5–28
output for typical usage modes of each MegaCore function. You can use this table to
predict the approximate latency between the input and the output of your video
processing pipeline.
The latency is described using one or more of the following measures:
■
■
■
■
Mode
Filter size: N × N
Filter size: N × N
All modes
Input format: 4:2:2; Output format: 4:4:4
Input format: 4:2:0; Output format: 4:4:4 or 4:2:2
All modes
the number of progressive frames
the number of interlaced fields
the number of lines when less than a field of latency
a small number of cycles O (cycles)
shows the approximate latency from the video data input to the video data
Chapter 5: Functional Descriptions
(N–1) lines +O (cycles)
(N–1) lines +O (cycles)
O (cycles)
O (cycles)
1 line + O (cycles)
O (cycles)
May 2011 Altera Corporation
Latency
(Note 1)
Latency