IPR-SDRAM/HPDDR2 Altera, IPR-SDRAM/HPDDR2 Datasheet - Page 24

• Manufacturer Part Number: IPR-SDRAM/HPDDR2
• Description: IP CORE Renewal Of IP-SDRAM/HDDR2
• Manufacturer: Altera

Specifications of IPR-SDRAM/HPDDR2

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Stratix FPGAs, Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

2–12
Table 2–5. Files to Compile—Verilog HDL IP Functional Simulation Models
DDR and DDR2 SDRAM High-Performance Controller User Guide
Library
altera_mf_ver
lpm_ver
sgate_ver
<device name>_ver
altera_ver
ALTGXB_ver
<device name>_hssi_ver
auk_ddr_hp_user_lib
Notes for
(1) Applicable only for Arria GX, Arria II GX, Stratix GX, Stratix II GX and Stratix IV devices.
(2) Applicable only for Arria GX, Hardcopy II, Stratix II and Stratix II GX devices.
Table
(1)
2–5:
4. Configure your simulator to use transport delays, a timestep of picoseconds, and
(1)
1
to include all the libraries in
File Name
<QUARTUS ROOTDIR>/eda/sim_lib/altera_mf.v
/eda/sim_lib/220model.v
eda/sim_lib/sgate.v
eda/sim_lib/<device name>_atoms.v
eda/sim_lib/<device name>_hssi_atoms.v
eda/sim_lib/altera_primitives.v
<device name>_mf.v
<device name>_hssi_atoms.v
<QUARTUS ROOTDIR>/
libraries/vhdl/altera/altera_europa_support_lib.v
alt_mem_phy_defines.v
<project directory>/<variation name>_phy_alt_mem_phy_seq_wrapper.vo
<project directory>/<variation name>_auk_ddr_hp_controller_wrapper.vo
<project directory>/<variation name>.v
<project directory>/<variation name>_example_top.v
<project directory>/<variation name>_phy.v
<project directory>/<variation name>_controller_phy.v
<project directory>/<variation name>_phy_alt_mem_phy_reconfig.v
<project directory>/<variation name>_phy_alt_mem_phy_pll.v
<project directory>/<variation name>_phy_alt_mem_phy.v
<project directory>/<variation name>_example_driver.v
<project directory>/<variation name>_ex_lfsr8.v
testbench/<variation name>_example_top_tb.v
testbench/<variation name>_mem_model.v
If you are targeting Stratix IV devices, you need both the Stratix IV and
Stratix III files (stratixiv_atoms and stratixiii_atoms) to simulate in your
simulator, unless you are using NativeLink
Table
2–5.
(1)
© March 2009 Altera Corporation
MegaWizard Plug-In Manager Flow
Chapter 2: Getting Started
(2)