CR16MCS9VJE8 National Semiconductor, CR16MCS9VJE8 Datasheet - Page 65

• Manufacturer Part Number: CR16MCS9VJE8
• Description: 16-Bit Microcontroller IC
• Manufacturer: National Semiconductor

Specifications of CR16MCS9VJE8

• Controller Family/series: CR16X
• Core Size: 16 Bit
• Program Memory Size: 64K X 8 Flash
• Digital Ic Case Style: PQFP
• No. Of Pins: 80
• Mounting Type: Surface Mount
• Clock Frequency: 25MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

17.0 MICROWIRE/SPI
MICROWIRE/PLUS is a synchronous serial communications
protocol, originally implemented in National Semiconductor's
COPS™ and HPC™ families of microcontrollers to minimize
the number of connections, and therefore the cost, of com-
municating with peripherals.
The enhanced MICROWIRE interface module includes the
following features:
17.1
The MICROWIRE interface allows several devices to be con-
nected on one three-wire system. At any given time, one of
these devices operates as the master while all other devices
operate as slaves.
The master device supplies the synchronous clock (MSK) for
the serial interface and initiates the data transfer. The slave
devices respond by sending (or receiving) the requested da-
ta. Each slave device uses the master’s clock for serially
shifting data out (or in), while the master shifts the data in (or
out).
The three-wire system includes: the serial data in signal
(MDIDO for master mode, MDODI for slave mode), the serial
— Programmable operation as a Master or Slave
— Programmable shift-clock frequency (master only)
— Programmable 8- or 16-bit mode of operation
— 8- or 16-bit serial I/O data shift register
— Two modes of clocking data
— Serial clock can be low or high when idle
— 16-bit read buffer
— Busy flag, Read Buffer Full flag, and Overrun flag for
— Supports multiple masters
— Maximum bit rate of 10M bits/second (master mode)
— Supports very low-end slaves with the Slave Ready
— Echo back enable/disable (Slave only)
I/O
Lines
polling and as interrupt sources
5M bits/second (slave mode) at 20MHz system clock
output
MICROWIRE OPERATION
Master
MDODI
MDIDO
MSK
MCS
5
DO
8-Bit
A/D
CS
SK
DI
Figure 24. MICROWIRE Interface
Chip Select Lines
EEPROM
DO
DO
1K Bit
SK
CS
DI
65
The device has an enhanced MICROWIRE/SPI interface
module (MWSPI) that can communicate with all peripherals
that conform to MICROWIRE or Serial Peripheral Interface
(SPI) specifications. This enhanced MICROWIRE interface
is capable of operating as either a master or slave and in 8-
or 16-bit mode. Figure24 shows a typical enhanced MI-
CROWIRE interface application.
data out signal (MDODI for master mode, MDIDO for slave
mode) and the serial clock (MSK).
In slave mode, an optional fourth signal (MCS) may be used
to enable the slave transmit. At any given time, only one
slave can respond to the master. Each slave device has its
own chip select signal (MCS) for this purpose.
The MICROWIRE interface allows the device to operate ei-
ther as a master or slave transferring 8- or 16-bits of data.
This is configured via the MMNS bit.
Figure25 shows a block diagram of the enhanced MICROW-
IRE serial interface in the device.
17.1.1
The MICROWIRE interface is a full duplex transmitter/receiv-
er. A 16-bit shifter, which can be split into a low and high byte,
is used for both transmitting and receiving. In 8-bit mode,
only the lower 8-bits are used to transfer data. The transmit-
ted data is shifted out through MDODI pin (master mode) or
MDIDO pin (slave mode), starting with the most significant
bit. At the same time, the received data is shifted in through
MDIDO pin (master mode) or MDODI pin (slave mode), also
starting with the most significant bit first.
The shift in and shift out are controlled by the MSK clock. In
each clock cycle of MSK, one bit of data is transmitted/re-
ceived. The 16-bit shifter is accessible via the MWDAT regis-
ter. Reading the MWDAT register returns the value in the
read buffer. Writing to the MWDAT register updates the 16-
bit shifter.
17.1.2
The enhanced MICROWIRE interface implements a double
buffer on read. As illustrated in Figure25, the double read
Display
driver
LCD
SK
CS
DI
Shifting
Reading
Display
Driver
SK
CS
VF
DI
MDODI
MDIDO
MCS
MSK
Slave
www.national.com
I/O
Lines