MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 80
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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1
Electrical Characteristics
4.7.8
The purpose of the IPU is to provide comprehensive support for the flow of data from an image sensor
and/or to a display device. This support covers all aspects of these activities:
4.7.8.1
The IPU supports a number of sensor input formats.
Pins used for various supported interface formats.
80
CSIx_DAT0
CSIx_DAT1
CSIx_DAT2
CSIx_DAT3
CSIx_DAT4
CSIx_DAT5
CSIx_DAT6
CSIx_DAT7
CSIx_DAT8
CSIx_DAT9
CSIx_DAT10
CSIx_DAT11
CSIx_DAT12
CSIx_DAT13
CSIx_DAT14
CSIx_DAT15
CSIx_DAT16
CSIx_DAT17
CSIx_DAT18
CSIx_DAT19
CSIx stands for CSI1 or CSI2
Name
Signal
•
•
•
Connectivity to relevant devices
Related image processing and manipulation: sensor image signal processing, display processing,
image conversions, and other related functions.
Synchronization and control capabilities, such as avoidance of tearing artifacts.
1
Image Processing Unit (IPU) Module Parameters
IPU Sensor Interface Signal Mapping
G[0], R[2] R[2],G[3],B[2]
G[1], R[3] R[3],G[4],B[3]
G[2], R[4] R[4],G[5],B[4]
B[0], G[3]
B[1], G[4]
B[2], G[5]
B[3], R[0]
B[4], R[1]
RGB565
2 cycles
8 bits
Table 54. Camera Input Signal Cross Reference, Format and Bits per Cycle
—
—
—
—
—
—
—
—
—
—
—
—
i.MX53xD Applications Processors for Consumer Products, Rev. 1
R[2],G[4],B[2]
R[3],G[5],B[3]
R[4],G[0],B[4]
R[0],G[1],B[0]
R[1],G[2],B[1]
RGB565
3 cycles
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
2
RGB666
3 cycles
R/G/B[4]
R/G/B[5]
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
—
cameras, displays, graphics accelerators, and TV encoders.
3
RGB888
3 cycles
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
R/G/B[6]
R/G/B[7]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
Table 54
2 cycles
YCbCr
Y/C[0]
Y/C[1]
Y/C[2]
Y/C[3]
Y/C[4]
Y/C[5]
Y/C[6]
Y/C[7]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
defines the mapping of the Sensor Interface
RGB565
2 cycles
16 bits
G[0]
G[1]
G[2]
G[3]
G[4]
G[5]
B[0]
B[1]
B[2]
B[3]
B[4]
R[0]
R[1]
R[2]
R[3]
R[4]
—
—
—
—
4
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
—
—
—
—
5
Freescale Semiconductor
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
0
0
0
0
6
YCbCr
1 cycle
20 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
C[8]
C[9]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
Y[8]
Y[9]
7
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