MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 68
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (2Mb)
Electrical Characteristics
68
No.
62
63
64
65
66
67
68
69
70
71
74
75
78
81
72
73
79
80
Clock cycle
Clock high period
Clock low period
SCKR rising edge to FSR out (bl) high
SCKR rising edge to FSR out (bl) low
SCKR rising edge to FSR out (wr) high
SCKR rising edge to FSR out (wr) low
SCKR rising edge to FSR out (wl) high
SCKR rising edge to FSR out (wl) low
Data in setup time before SCKR (SCK in synchronous
mode) falling edge
Data in hold time after SCKR falling edge
FSR input (bl, wr) high before SCKR falling edge
FSR input (wl) high before SCKR falling edge
FSR input hold time after SCKR falling edge
SCKT rising edge to FST out (bl) high
SCKT rising edge to FST out (bl) low
SCKT rising edge to FST out (wr) high
SCKT rising edge to FST out (wr) low
• For internal clock
• For external clock
• For internal clock
• For external clock
5
Characteristics
i.MX53xD Applications Processors for Consumer Products, Rev. 1
Table 45. Enhanced Serial Audio Interface (ESAI) Timing
1
’
2,3
6
6
6
6
6
Symbol
t
SSICC
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Expression
2 × T c − 9.0
2 × T c − 9.0
4 × T c
4 × T c
2 × T c
2 × T c
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
30.0
30.0
12.0
19.0
12.0
12.0
Min
3.5
9.0
2.0
2.0
2.5
8.5
15
15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
6
Max
17.0
17.0
19.0
19.0
16.0
17.0
18.0
20.0
10.0
20.0
10.0
22.0
12.0
Freescale Semiconductor
7.0
7.0
9.0
9.0
6.0
7.0
8.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Condition
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
—
—
—
—
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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