MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 24
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Electrical Characteristics
4.2
The system design must comply with power-up sequence, power-down sequence and steady state
guidelines as described in this section to guarantee the reliable operation of the device. Any deviation from
these sequences may result in the following situations:
4.2.1
The following observations should be considered:
24
Analog Supply 2.5 V
USB_H1_VDDA25
USB_OTG_VDDA25
Digital Supply
VCC (1.2 V)
USB_H1_VDDA33 + USB_OTG_VDDA33 +
USB_H1_VDDA25 + USB_OTG_VDDA25 +
VCC
•
•
•
Excessive current during power-up phase
Prevention of the device from booting
Irreversible damage to the i.MX53xD processor (worst-case scenario)
• The consequent steps in power up sequence should not start before the previous step supplies
• NVCC_SRTC_POW should remain powered ON continuously, to maintain internal real-time
• The VCC should be powered ON together, or any time after NVCC_SRTC_POW.
• NVCC_CKIH should be powered ON after VCC is stable and before other IO supplies
• IO Supplies (NVCC_xxx) below or equal to 2.8 V nom./3.1 V max. should not precede
• IO Supplies (NVCC_xxx) above 2.8 V nom./3.1 V max. should be powered ON only after
• In case VDD_DIG_PLL and VDD_ANA_PLL are powered ON from internal voltage regulator
Power Supplies Requirements and Restrictions
have been stabilized within 90-110% of their nominal voltage, unless stated otherwise.
clock status. Otherwise, it has to be powered ON together with VCC, or preceding VCC.
(NVCC_xxx) are powered ON.
NVCC_CKIH. They can start powering ON during NVCC_CKIH ramp-up, before it is
stabilized. Within this group, the supplies can be powered-up in any order.
NVCC_CKIH is stable.
(default case for i.MX53xD), there are no related restrictions on VDD_REG, as it is used as their
Power-Up Sequence
Parameter
i.MX53xD Applications Processors for Consumer Products, Rev. 1
Table 9. USB Interface Current Consumption (continued)
Full Speed
High Speed
Full Speed
High Speed
Suspend
Conditions
RX
RX
RX
RX
TX
TX
TX
TX
Typical @ 25 °C
6.5
6.5
12
21
8
8
8
8
Freescale Semiconductor
Max
13
22
—
—
—
—
7
7
Unit
mA
mA
μA
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