MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 171
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Freescale Semiconductor
1
2
3
4
USB_H1_DP
USB_H1_GPA
NAIO
USB_H1_RRE
FEXT
USB_H1_VBU
S
USB_OTG_D
N
USB_OTG_DP B19
USB_OTG_G
PANAIO
USB_OTG_ID
USB_OTG_R
REFEXT
USB_OTG_VB
US
XTAL
Package Pin
The state immediately after reset and before ROM firmware or software has executed.
During power-on reset this port acts as input for fuse override, ~33KΩ PU/PD recommended to set the value. See
“Boot Mode Configuration
During power-on reset this port acts as output for diagnostic signal INT_BOOT
During power-on reset this port acts as output for diagnostic signal ANY_PU_RST
Name
A16
B16
D15
A19
F15
C16
D16
E15
AC11
Table 110. 19 x 19 mm Signal Assignments, Power Rails, and I/O (continued)
Package
A17
KEY_COL0 and GPIO_19 act as output for diagnostic signals during
power-on reset.
Assign
ment
Pin
i.MX53xD Applications Processors for Consumer Products, Rev. 1
USB_H1_VDDA25,
USB_H1_VDDA33
USB_H1_VDDA25,
USB_H1_VDDA33
USB_H1_VDDA25,
USB_H1_VDDA33
USB_H1_VDDA25,
USB_H1_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
USB_OTG_VDDA25,
USB_OTG_VDDA33
NVCC_XTAL
Pins” for details.
Power Rail
ANALOG50 —
ANALOG25 —
ANALOG25 —
ANALOG50 —
ANALOG50 —
ANALOG50 —
ANALOG25 —
ANALOG25 —
ANALOG25 —
ANALOG50 —
ANALOG
I/O Buffer
Type
NOTE
Mode
—
Alt.
USB
USB
USB
USB
USB
USB
USB
USB
USB
USB
XTALO
SC
Package Information and Contact Assignments
Out of Reset Condition
USB_H1_DP
USB_H1_GPANA
IO
USB_H1_RREFE
XT
USB_H1_VBUS
USB_OTG_DN
USB_OTG_DP
USB_OTG_GPA
NAIO
USB_OTG_ID
USB_OTG_RRE
FEXT
USB_OTG_VBU
S
XTAL
Block I/O
Directio
—
—
—
—
—
—
—
—
—
—
—
n
1
Section 5.1,
Config./
Value
—
—
—
—
—
—
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—
171
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