MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 57

KIT DEVELOPMENT I.MX53

MCIMX53-START

Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets

Specifications of MCIMX53-START

Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed

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4.6.6.5
Figure 22
(CS) state for asynchronous and DTACK EIM accesses with corresponding EIM bit fields and the timing
parameters mentioned above.
Asynchronous read & write access length in cycles may vary from what is shown in
Figure 25
gramming model.
Freescale Semiconductor
Figure 21. 16-Bit Muxed A/D Mode, Synchronous Read Access, WSC=7, RADVN=1, ADH=1, OEA=2
M_DATA
ADV_B
through
as RWSC, OEN & CSN is configured differently. Refer to i.MX53xDRM for the EIM pro-
ADDR/
CSx_B
BEy_B
WE_B
OE_B
BCLK
General EIM Timing-Asynchronous Mode
Figure
i.MX53xD Applications Processors for Consumer Products, Rev. 1
Last
26, and
Valid Addr
WE14
WE12
WE4
WE6
Table 39
Address V1
help to determine timing parameters relative to the chip select
WE5
WE15
WE10
WE18
Electrical Characteristics
WE19
WE11
WE13
WE7
Figure 22
Data
through
57

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