IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 58

• Manufacturer Part Number: IDT82P5088BBG
• Description: IC LIU T1/E1/J1 OCTAL 256PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P5088BBG

• Includes: Integrated Clock Adapter
• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Power (watts): 2.57W
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

4.3.9
Table-63 INTS0: Interrupt Status Register 0
PROGRAMMING INFORMATION
IDT82P5088
TCLK_LOS_IS
NLPD_IS
PRBS_IS
NLPA_IS
Symbol
LOS_IS
AIS_IS
DF_IS
INTERRUPT STATUS REGISTERS
-
(This register is cleared if a ’1’ is written to it.) (R/W, Address = X3AH)
Bit
4
3
7
6
5
2
1
0
Default
0
0
0
0
0
0
0
0
Reserved
This bit indicates the occurrence of the Inband Loopback Activate Code interrupt event.
= 0: no Inband Loopback Activate Code interrupt event occurred
= 1: Inband Loopback Activate Code Interrupt event occurred
This bit indicates the occurrence of the Inband Loopback Deactivate Code interrupt event.
= 0: no Inband Loopback Deactivate Code interrupt event occurred
= 1: interrupt event of the received inband loopback deactivate code occurred.
This bit indicates the occurrence of the interrupt event generated by the PRBS/QRSS synchronization status.
= 0: no PRBS/QRSS synchronization status interrupt event occurred
= 1: PRBS/QRSS synchronization status interrupt event occurred
This bit indicates the occurrence of the interrupt event generated by the TCLKn loss detection.
= 0: no TCLKn loss interrupt event.
= 1:TCLKn loss interrupt event occurred.
This bit indicates the occurrence of the interrupt event generated by the Driver Failure.
= 0: There is no status change on the DF_S bit (b2, T1/J1-036H,...).
= 1: When the DF_IES bit (b2, T1/J1-035H,...) is ‘0’, the ‘1’ on this bit indicates there is a transition from ‘0’ to ‘1’
on the DF_S bit (b2, T1/J1-036H,...); when the DF_IES bit (b2, T1/J1-035H,...) is ‘1’, the ‘1’ on this bit indicates
there is a transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the DF_S bit (b2, T1/J1-036H,...).
This bit indicates the Alarm Indication Signal Interrupt Status detection.
= 0: No AIS happen since last reset AIS_IS
= 1: 0 to 1 transition on bit AIS_S if AIS_IES=0, or any change on bit AIS_S if AIS_IES=1
This bit indicates the occurrence of the LOS (Loss of signal) interrupt event.
= 0: There is no status change on the LOS_S bit (b0, T1/J1-036H,...).
= 1: When the LOS_IES bit (b0, T1/J1-035H,...) is ‘0’, the ‘1’ on this bit indicates there is a transition from ‘0’ to ‘1’
on the LOS_S bit (b0, T1/J1-036H,...); when the LOS_IES bit (b0, T1/J1-035H,...) is ‘1’, the ‘1’ on this bit indicates
there is a transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the LOS_S bit (b0, T1/J1-036H,...).
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
58
Description
February 5, 2009