IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 45

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IDT82P5088BBG

Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82P5088BBG

Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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Table-39 TCF0: Transmitter Configuration Register 0 for Transmit Path (Continued)
Table-40 TCF1: Transmitter Configuration Register 1 for Transmit Path
for E1/75 Ω cable impedance, the PULS[3:0] bits should be set to ‘0001’.
PROGRAMMING INFORMATION
IDT82P5088
1. In internal impedance matching mode, for E1/75 Ω cable impedance, the PULS[3:0] bits (TCF1, X23H) should be set to ‘0000’. In external impedance matching mode,
TCLK_SEL
DFM_OFF
T_MD[1:0]
PULS[3:0]
Symbol
Symbol
TD_INV
T_OFF
THZ
-
(R/W, Address = X22H)
(R/W, Address = X23H)
Bit
7-6
3-0
1-0
Bit
5
4
3
2
4
Default
Default
0000
00
00
0
0
0
0
1
Transmitter power down enable
= 0: Transmitter power up
= 1: Transmitter power down and line driver high impedance
Transmit data invert
= 0: data on TDn or TDPn/TDNn is active high
= 1: data on TDn or TDPn/TDNn is active low
Transmit clock edge select
= 0: data on TDn or TDPn/TDNn is sampled on the falling edges of TCLKn
= 1: data on TDn or TDPn/TDNn is sampled on the rising edges of TCLKn
Transmitter operation mode control bits which select different stages of transmit data path
= 00: enable HDB3/B8ZS encoder and waveform shaper blocks, input on TDn is single rail NRZ data
= 01: enable AMI encoder and waveform shaper blocks, input on pin TDn is single rail NRZ data
= 1x: encoder is bypassed, dual rail NRZ transmit data input on pin TDPn/TDNn
Reserved. This bit should be ‘0’ for normal operation.
Transmit driver failure monitor disable
= 0: DFM is enabled
= 1: DFM is disabled
Transmit line driver high impedance enable
= 0: normal state
= 1: transmit line driver high impedance enable (other transmit path still in normal state)
These bits select the transmit template/LBO for short-haul/long-haul applications.
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
0111
11xx
1
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
User programmable waveform setting
T1/E1/J1
DSX1
DSX1
DSX1
DSX1
DSX1
DS1
DS1
DS1
DS1
E1
E1
J1
45
2.048 MHz
2.048 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
TCLK
Description
Description
Impedance
120 Ω
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
110 Ω
100 Ω
100 Ω
100 Ω
100 Ω
Cable
75 Ω
-22.5 dB LBO
Cable Range
-7.5 dB LBO
-15 dB LBO
133~266 ft
266~399 ft
399~533 ft
533~655 ft
0 dB LBO
0~133 ft
0~655 ft
or LBO
-
-
February 5, 2009
0~43 dB (default)
Cable Loss
0.6~1.2 dB
1.2~1.8 dB
1.8~2.4 dB
2.4~3.0 dB
0~28.5 dB
0~13.5 dB
0~0.6 dB
0~3.0 dB
0~43 dB
0~36 dB
0~21 dB

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