IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 38

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IDT82P5088BBG

Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82P5088BBG

Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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3.10 INTERRUPT HANDLING
The INT_CH[7:0] bits (INTCH, 09H) should be read to identify which chan-
nel(s) generate the interrupt.
Status Register (INTS0, 3AH...) or (INTS1, 3BH...). Every kind of interrupt
can be enabled/disabled individually by the corresponding bit in the register
(INTENC0, 33H...) or (INTENC1, 34H...). Some event is reflected by the
corresponding bit in the Status Register (STAT0, 36H...) or (STAT1,
37H...), and the Interrupt Trigger Edge Selection Register can be used to
determine how the Status Register sets the Interrupt Status Register.
read, the corresponding bit indicating which channel generates the inter-
rupt in the INTCH register (09H) will be reset. Only when all the pending
interrupt is acknowledged through reading the Interrupt Status Registers
of all the channels (INTS0, 3AH...) or (INTS1, 3BH...) will all the bits in the
INTCH register (09H) be reset and the INT pin become inactive.
Table-26 Interrupt Event
Inband Loopback Deactivate Code Status
FUNCTIONAL DESCRIPTION
IDT82P5088
Arbitrary Waveform Generator Overflow
Synchronization Status of PRBS/QRSS
Inband Loopback Activate Code Status
An active level on the INT pin represents an interrupt of the IDT82P5088.
The interrupt event is captured by the corresponding bit in the Interrupt
After the Interrupt Status Register (INTS0, 3AH...) or (INTS1, 3BH...) is
One-Second Timer Expired
Excessive Zeros Received
Code Violation Received
Error Counter Overflow
Driver Failure Detected
Equalizer Out of Range
JA FIFO Underflow
PRBS/QRSS Error
JA FIFO Overflow
Interrupt Event
LOS Detected
AIS Detected
TCLKn Loss
(STAT0, STAT1)
TCLK_LOS
Status bit
PRBS_S
NLPA_S
NLPD_S
LOS_S
AIS_S
EQ_S
DF_S
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
Interrupt Status bit
38
(INTS0, INTS1)
TCLK_LOS_IS
CNT_OV_IS
DAC_OV_IS
source for one channel:
tus bit, Interrupt Status bit, Interrupt Trigger Edge Selection bit and Interrupt
Mask bit.
TMOV_IS
PRBS_IS
JAOV_IS
JAUD_IS
NLPD_IS
NLPA_IS
ERR_IS
LOS_IS
EXZ_IS
AIS_IS
DF_IS
CV_IS
EQ_IS
There are totally fourteen kinds of events that could be the interrupt
(1).LOS Detected
(2).AIS Detected
(3).Driver Failure Detected
(4).TCLK Loss
(5).Synchronization Status of PRBS
(6).PRBS Error Detected
(7).Code Violation Received
(8).Excessive Zeros Received
(9).JA FIFO Overflow/Underflow
(10).Inband Loopback Code Status
(11).Equalizer Out of Range
(12).One-Second Timer Expired
(13).Error Counter Overflow
(14).Arbitrary Waveform Generator Overflow
Table-26
is a summary of all kinds of interrupt and their associated Sta-
Interrupt Edge Selection bit
PRBS_IES
NLPD_IES
TCLK_IES
NLPA_IES
LOS_IES
AIS_IES
(INTES)
DF_IES
EQ_IES
(INTENC0, INTENC1)
Interrupt Mask bit
February 5, 2009
DAC_OV_IE
TIMER_IE
PRBS_IE
NLPD_IE
TCLK_IE
JAOV_IE
JAUD_IE
NLPA_IE
ERR_IE
CNT_IE
LOS_IE
EXZ_IE
AIS_IE
CV_IE
EQ_IE
DF_IE

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