IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 44
IDT82P5088BBG
Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82P5088BBG.pdf
(81 pages)
Specifications of IDT82P5088BBG
Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
170
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
20 000
Table-36 TIMER INTS: Timer Interrupt Status Register
4.3.2
Table-37 TIE1 MODE: T1 or E1 Mode Select Register
4.3.3
Table-38 TJACF: Jitter Attenuator Configuration Register for Transmit Path
Table-39 TCF0: Transmitter Configuration Register 0 for Transmit Path
PROGRAMMING INFORMATION
IDT82P5088
TJITT_TEST
TJA_DP[1:0]
TJA_LIMIT
TEMODE
TMOVIS
TJA_BW
Symbol
Symbol
Symbol
Symbol
TJA_E
PER CHANNEL CONTROL REGISTERS
TRANSMIT PATH CONTROL REGISTERS
-
-
-
-
(R/W, Address = X22H)
(R/W, Address = X20H)
(R/W, Address = X21H)
(bit TMOV_IS is reset after writing a 1 into this bit position)
7-1
7-1
7-6
2-1
7-5
Bit
Bit
Bit
Bit
0
0
0
5
4
3
Default
Default
Default
Default
000000
000000
000
00
00
00
0
0
0
1
0
Reserved.
Indicate One second timer whether is over or not.
= 0: One second timer is not over since last reset TMOVIS.
= 1: One second timer is over and generate an interrupt request if no masked.
Reserved
This bit selects the operating mode for the current link.
= 0: E1 mode is selected.
= 1: T1/J1 mode is selected.
Reserved
This bit selects jitter measure mode
= 0: real time mode (update jitter measuring value each received clock cycle)
= 1: accumulation mode (measuring p-p value of jitter since last read)
Wide Jitter Attenuation bandwidth
= 0: normal mode
= 1: JA limit mode
Jitter Attenuator configuration
= 0: JA not used
= 1: JA enabled
Jitter Attenuator depth selection
= 00: 128 bits
= 01: 64 bits
= 10/11: 32 bits
Jitter transfer function bandwidth selection
Reserved
JABW
0
1
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
44
(R, Address = 0DH)
1.26 Hz
T1/J1
5 Hz
Description
Description
Description
Description
6.77 Hz
0.87 Hz
E1
February 5, 2009