IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 34

• Manufacturer Part Number: IDT82P5088BBG
• Description: IC LIU T1/E1/J1 OCTAL 256PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P5088BBG

• Includes: Integrated Clock Adapter
• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Power (watts): 2.57W
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

3.6
3.6.1
IDT82P5088:
•
Table-23 EXZ Definition
3.6.2
zero errors and PRBS logic errors) will be counted is determined by
ERR_SEL[1:0] bits (MAINT6, 31H...). Only one type of receiving error can
be counted at a time except that when the ERR_SEL[1:0] bits are set to ‘11’,
both CV/BPV and EXZ errors will be detected and counted.
Once an error is detected, an error interrupt which is indicated by corre-
sponding bit in (INTS1, 3BH...) will be generated if it is not masked. This
Error Counter can be operated in two modes: Auto Report Mode and Man-
ual Report Mode, as selected by the CNT_MD bit (MAINT6, 31H...). In Sin-
gle Rail mode, once BPV or CV errors are detected, the CVn pin will be
driven to high for one RCLK period.
errors when the CNT_MD bit (MAINT6, 31H...) is set to ‘1’. A one-second
timer is used to set the counting period. The received errors are counted
within one second. If the one-second timer expires, the value in the internal
counter will be transferred to (CNTL, 3CH...) and (CNTH, 3DH...), then the
internal counter will be reset and start to count received errors for the next
second. The errors occurred during the transfer will be accumulated to the
next round. The expiration of the one-second timer will set TMOV_IS bit
(INTS1, 3BH...) to ‘1’, and will generate an interrupt if the TIMER_IE bit
(INTENC1, 34H...) is set to ‘0’. The CV_IS bit (INTS1, 3BH...) will be cleared
after the interrupt register is read. The content in the (CNTL, 3CH...) and
FUNCTIONAL DESCRIPTION
IDT82P5088
The following line encoding errors can be detected and counted by the
Which type of the receiving errors (Received CV/BPV errors, excess
The receiving errors are counted in an internal 16-bit Error Counter.
• Auto Report Mode
In Auto Report Mode, the internal counter starts to count the received
Received Bipolar Violation (BPV) Error: In AMI coding, when two
consecutive pulses of the same polarity are received, a BPV error
is declared.
HDB3
B8ZS
AMI
ERROR DETECTION/COUNTING AND INSERTION
DEFINITION OF LINE CODING ERROR
ERROR DETECTION AND COUNTING
More than 15 consecutive 0s are detected
More than 3 consecutive 0s are detected
More than 7 consecutive 0s are detected
ANSI
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
34
•
•
(CNTH, 3DH...) should be read within the next second. If the counter over-
flows, a counter overflow interrupt which is indicated by CNT_OV_IS bit
(INTS1, 3BH...) will be generated if it is not masked by CNT_IE bit
(INTENC1, 34H...).
EXZ Definition
HDB3/B8ZS Code Violation (CV) Error: In HDB3/B8ZS coding, a
CV error is declared when two consecutive BPV errors are
detected, and the pulses that have the same polarity as the previ-
ous pulse are not the HDB3/B8ZS zero substitution pulses.
Excess Zero (EXZ) Error: there are two standards defining the EXZ
errors: ANSI and FCC. The EXZ_DEF bit (MAINT6, 31H...)
chooses which standard will be adopted by the corresponding
channel to judge the EXZ error.
N
read the data in CNTL, CNTH within
the next second
Figure-17 Auto Report Mode
CNTL, CNTH
counter
More than 80 consecutive 0s are detected
Bit TMOV_IS is cleared after
More than 3 consecutive 0s are detected
More than 7 consecutive 0s are detected
One-Second Timer expired?
the interrupt register is read
Bit TMOV_IS is set to '1'
Auto Report Mode
(CNT_MD=1)
counting
0
Y
data in counter
FCC
Table-23
shows definition of EXZ.
February 5, 2009
same process
next second
repeats the