IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 49
IDT82P5088BBG
Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82P5088BBG.pdf
(81 pages)
Specifications of IDT82P5088BBG
Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
170
Company:
Part Number:
IDT82P5088BBG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P5088BBG
Manufacturer:
IDT
Quantity:
20 000
Table-47 RCF2: Receiver Configuration Register 2 for Receive Path
4.3.5
Table-48 MAINT0: Maintenance Function Control Register 0
Table-49 MAINT1: Maintenance Function Control Register 1
PROGRAMMING INFORMATION
IDT82P5088
UPDW[1:0]
SLICE[1:0]
PATT[1:0]
Symbol
MG[1:0]
Symbol
Symbol
ARLP
RLP
DLP
ALP
NETWORK DIAGNOSTICS CONTROL REGISTERS
-
-
-
(R/W, Address = X2AH)
(R/W, Address = X2CH)
(R/W, Address = X2BH)
7-6
5-4
3-2
1-0
7-4
6-5
Bit
Bit
Bit
3
2
0
1
7
Default
Default
Default
0000
00
01
10
00
00
0
0
0
0
0
Reserved
Receive slicer threshold
= 00: The receive slicer generates a mark if the voltage on RTIPn/RRINGn exceeds 40% of the peak amplitude.
= 01: The receive slicer generates a mark if the voltage on RTIPn/RRINGn exceeds 50% of the peak amplitude.
= 10: The receive slicer generates a mark if the voltage on RTIPn/RRINGn exceeds 60% of the peak amplitude.
= 11: The receive slicer generates a mark if the voltage on RTIPn/RRINGn exceeds 70% of the peak amplitude.
Equalizer observation window
= 00: 32 bits
= 01: 64 bits
= 10: 128 bits
= 11: 256 bits
Monitor gain setting: these bits select the internal linear gain boost
= 00: 0 dB
= 01: 22 dB
= 10: 26 dB
= 11: 32 dB
Reserved
Automatic Remote Loopback Control
= 0: disables Automatic Remote Loopback (normal transmit and receive operation)
= 1: enables Automatic Remote Loopback
Remote loopback enable
= 0: disables remote loopback (normal transmit and receive operation)
= 1: enables remote loopback
Analog loopback enable
= 0: disables analog loopback (normal transmit and receive operation)
= 1: enables analog loopback
Digital loopback enable
= 0: disables digital loopback (normal transmit and receive operation)
= 1: enables digital loopback
Reserved
These bits select the internal pattern and insert it into the transmit data stream.
= 00: normal operation (PATT_CLK = 0) / insert all zeros (PATT_CLK = 1)
= 01: insert All Ones
= 10: insert PRBS (E1: 2
= 11: insert programmable Inband Loopback activate or deactivate code
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
15
-1) or QRSS (T1/J1: 2
49
20
Description
Description
Description
-1)
February 5, 2009