IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 50

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IDT82P5088BBG

Manufacturer Part Number
IDT82P5088BBG
Description
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82P5088BBG

Includes
Integrated Clock Adapter
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Power (watts)
2.57W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

Available stocks

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Manufacturer
Quantity
Price
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Manufacturer:
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Table-49 MAINT1: Maintenance Function Control Register 1 (Continued)
Table-50 MAINT2: Maintenance Function Control Register 2
Table-51 MAINT3: Maintenance Function Control Register 3
PROGRAMMING INFORMATION
IDT82P5088
RNLPD_L[1:0]
RNLPA_L[1:0]
TNLP_L[1:0]
PATT_CLK
PRBS_INV
TNLP[7:0]
Symbol
Symbol
Symbol
RAISE
ATAO
LAC
-
(R/W, Address = X2EH)
(R/W, Address = X2CH)
(R/W, Address = X2DH)
7-6
5-4
3-2
1-0
7-0
Bit
Bit
Bit
4
1
3
2
0
(000)00001 Defines the user-programmable transmit Inband Loopback activate/deactivate code. The default selection is
Default
Default
Default
00
00
00
01
0
0
0
0
0
Selects reference clock for transmitting internal pattern
= 0: uses TCLKn as the reference clock
= 1: uses MCLK as the reference clock
Inverts PRBS
= 0: PRBS data is not inverted
= 1: PRBS data is inverted before transmission and detection
The LOS/AIS criterion is selected as below:
= 0: G.775 (E1) / T1.231 (T1/J1)
= 1: ETSI 300233 & I.431 (E1) / I.431 (T1/J1)
AIS enable during LOS
= 0: AIS insertion on RDPn/RDNn/RCLKn is disabled during LOS
= 1: AIS insertion on RDPn/RDNn/RCLKn is enabled during LOS
Automatically Transmit All Ones during LOS (enabled only when PATT[1:0] = 00)
= 0: disabled
= 1: Automatically Transmit All Ones pattern at TTIPn/TRINGn during LOS.
Reserved.
Defines the length of the user-programmable transmit Inband Loopback activate/deactivate code contained in
TNLP register. The default selection is 5 bits length.
= 00: 5-bit activate code in TNLP [4:0]
= 01: 6-bit activate code in TNLP [5:0]
= 10: 7-bit activate code in TNLP [6:0]
= 11: 8-bit activate code in TNLP [7:0]
Defines the length of the user-programmable receive Inband Loopback activate code contained in RNLPA regis-
ter.
= 00: 5-bit activate code in RNLPA [4:0]
= 01: 6-bit activate code in RNLPA [5:0]
= 10: 7-bit activate code in RNLPA [6:0]
= 11: 8-bit activate code in RNLPA [7:0]
Defines the length of the user-programmable receive Inband Loopback deactivate code contained in RNLPD reg-
ister.
= 00: 5-bit deactivate code in RNLPD [4:0]
= 01: 6-bit deactivate code in RNLPD [5:0]
= 10: 7-bit deactivate code in RNLPD [6:0]
= 11: 8-bit deactivate code in RNLPD [7:0]
00001.
TNLP[7:0] form the 8-bit repeating code
TNLP[6:0] form the 7-bit repeating code
TNLP[5:0] form the 6-bit repeating code
TNLP[4:0] form the 5-bit repeating code
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
50
Description
Description
Description
February 5, 2009

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