TRC105 RFM, TRC105 Datasheet - Page 63

• Manufacturer Part Number: TRC105
• Description: IC TXRX 300MHZ-510MHZ 32TQFN
• Manufacturer: RFM

Specifications of TRC105

• Frequency: 300MHz ~ 510MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -112dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Wireless Frequency: 300 MHz to 510 MHz
• Output Power: 13 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 1.7 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, OOK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 583-1159-2

6.7 Battery Power Management Configuration Values
Battery life can be greatly extended in TRC105 applications where transmissions from field nodes are infrequent,
or network communications can be concentrated into periodic time slots. For example, field nodes in many wire-
less alarm systems report operational status a few times a day, and can otherwise sleep unless an alarm condi-
tion occurs. Sensor networks that monitor parameters that change relatively slowly, such as air and soil tempera-
ture in agricultural settings, only need to transmit updates a few times an hour.
At room temperature the TRC105 draws a maximum of 1 µA in sleep mode, with a typical value of 100 nA. To
achieve minimum sleep mode current, nSS_CONFIG (Pin 14), SDI (Pin 17) and SCK (Pin 18) must be held logic
low, while nSS_DATA (Pin 15) must be held logic high. Also, the external connection to SDO (Pin 16) must be
configured as high impedance (tri-state or input). The TRC105 can go from sleep mode through standby mode
and synthesizer mode to transmit (or receive) mode in less than 6 ms. At a data rate of 33.33 kb/s, a 32 byte
packet with a 4 byte preamble and a 4 byte start pattern takes about 10 ms to transmit. Assume that the TRC105
then switches to receive mode for 1 second to listen for a response and returns to sleep. On the basis of reporting
every six hours, the ON to sleep duty cycle is about 1:21,259, greatly extending battery life over continuous
transmit-receive or even standby operation. RFM provides an Excel spreadsheet, battery_ life_ calculator.xls, in
the Application Notes section of
The required timing accuracy for the microcontrollers in a sleep-cycled application depends on several things:
NOTE: The host microcontroller usually cannot be operated from the TRC105 buffered clock output if sleep cy-
cling is planned. In sleep mode, the TRC105 buffered clock output is disabled, which will disable the microcontrol-
ler unless it is capable of automatically switching to an internal clock source when external clocking is lost.
TRC105 sleep related mode switching is configured in MCFG00 bits 7..5 as follows:
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24. When ready to receive, Place the TRC105 in synthesizer mode by setting MCFG00 bits 7..5 set to 010.
25. Switch from synthesizer mode to receive mode by setting MCFG00 bits 7..5 to 011.
26. Monitor IRQ0. When an error free packet is received addressed to this node, IRQ0 will set.
27. Switch the TRC105 to standby mode by setting MCFG00 bits 7..5 to 001.
28. Set bit 6 to 1 in PKTCFG1F to enable FIFO read in standby mode.
29. Retrieve the received data from the FIFO through the SPI port.
30. From standby mode, enter another transmit cycle as outlined in steps 20 through 23, or enter
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Monitor the TRC105 Pin 23 to confirm PLL lock.
another receive cycle as outlined in steps 24 through 30.
The required “time-stamp” accuracy of data reported by sleeping field nodes. R-C sleep mode timers built
into many microcontrollers have a tolerance of ±20% or more. Where more accurate time stamping is re-
quired, many microcontrollers can run on a watch crystal during sleep and achieve time stamp accuracies
better than 1 second per 24 hours.
If the base station and any routing nodes present in a network must sleep cycle in addition to the field
nodes, watch crystal control will usually be needed to keep all nodes accurately synchronized to the ac-
tive time slots.
If the base station and any routing nodes present in a network can operate continuously (AC powered,
solar charged batteries, etc.) and a loose time stamp accuracy is OK, the microcontrollers in sleeping field
nodes can usually operated from internal low-accuracy R-C timers.
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Technical support +1.800.704.6079
to support battery life for various operating scenarios.
TRC105 - 11/01/10
Page 63 of 66