TRC105 RFM, TRC105 Datasheet - Page 33

• Manufacturer Part Number: TRC105
• Description: IC TXRX 300MHZ-510MHZ 32TQFN
• Manufacturer: RFM

Specifications of TRC105

• Frequency: 300MHz ~ 510MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -112dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Wireless Frequency: 300 MHz to 510 MHz
• Output Power: 13 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 1.7 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, OOK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 583-1159-2

4.2 Interrupt Configuration Registers (IRQCFG)
0x0D - IRQCFG0D [default 0x00]
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Name
RX_IRQ0
RX_IRQ1
TX_IRQ0
TX_IRQ1
FIFOFULL
nFIFOEMPY
E-mail:
Bits
7,6
5,4
3
2
1
0
[e-mail]
R/W
r/w
r/w
r/w
r
r
r
Description
IRQ0 source in receive mode:
Continuous data mode -
Buffered data mode -
Packet data mode -
IRQ1 source in receive mode.
Continuous data mode -
Buffered data mode -
Packet data mode -
IRQ0 source in transmit mode:
Continuous data mode -
Buffered or Packet data modes -
IRQ1 source in transmit mode.
Continuous data mode -
Buffered or Packet data modes -
FIFO full (IRQ source)
low when FIFO empty (IRQ source).
00 → IRQ0 mapped to pattern signal
01 → IRQ0 mapped to RSSI_IRQ
10,11 → IRQ0 mapped to start pattern detect
00 → IRQ0 set to 0
01 → IRQ0 mapped to Write_byte
10 → IRQ0 mapped to nFIFOEMPY (also in Standby mode)
11 → IRQ0 mapped to start pattern detect
00 → IRQ0 mapped to Data_Rdy signal
01 → IRQ0 mapped to Write_byte
10 → IRQ0 mapped to nFIFOEMPY (also in Standby mode)
11 → IRQ0 mapped to Node Address Match if ADDRS_cmp is enabled
11 → IRQ0 mapped to Start Pattern Detect if ADDRS_cmp is not enabled
00 → IRQ1 mapped to DCLK signal
01,10,11 → IRQ1 mapped to DCLK
00 → IRQ1 set to 0
01 → IRQ1 mapped to FIFOFULL
10 → IRQ1 mapped to RSSI_IRQ
11 → IRQ1 mapped to FIFO_Int_Rx (also in Standby mode)
00 → IRQ1 mapped to CRC_OK
01 → IRQ1 mapped to FIFOFULL (also in Standby mode)
10 → IRQ1 mapped to RSSI_IRQ
11 → IRQ1 mapped to FIFO_Int_Rx (also in Standby mode)
0,1 → IRQ0 set to 0
0 → IRQ0 mapped to FIFO_thresh (transmission starts when IRQ0 switches high)
1 → IRQ0 is mapped to nFIFOEMPY (transmission starts when IRQ0 switches high)
0, 1→ IRQ_1 mapped to DCLK
0 → IRQ1 mapped to FIFOFULL
1 → IRQ1 is mapped to TX_Stop
Technical support +1.800.704.6079
Table 28
TRC105 - 11/01/10
Page 33 of 66