AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 84

• Manufacturer Part Number: AT91SAM9261SB-CU-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

13.11 Hardware and Software Constraints
84
AT91SAM9261S
Note:
The SPI and NAND Flash drivers use several PIOs in alternate functions to communicate with
devices. Care must be taken when these PIOs are used by the application. The devices con-
nected could be unintentionally driven at boot time, and electrical conflicts between SPI output
pins and the connected devices may appear.
To assure correct functionality, it is recommended to plug in critical devices to other pins.
Table 13-5
are driven during the boot sequence for a period of less than 1 second if no correct boot program
is found.
Before performing the jump to the application in internal SRAM, all the PIOs and peripherals
used in the boot program are set to their reset state.
Table 13-5.
Peripheral
SPI0
SPI0
SPI0
SPI0
PIOC
PIOC
PIOC
Address Bus
Address Bus
MCI0
MCI0
MCI0
MCI0
MCI0
MCI0
TWI
• The DataFlash, SerialFlash, NAND Flash, SDCard
• The code is always downloaded from the device address 0x0000_0000 to the address
• The downloaded code must be position-independent or linked at address 0x0000_0000.
• The DataFlash must be connected to NPCS0 of the SPI.
must be inferior to 12 Kbytes.
0x0000_0000 of the internal SRAM (after remap).
1. Boot ROM does not support high capacity SDCards.
contains a list of pins that are driven during the boot program execution. These pins
Pins Driven during Boot Program Execution
Pin
MOSI
MISO
SPCK
NPCS0
NANDCS
NAND OE
NAND WE
NAND CLE
NAND ALE
MCDA0
MCCDA
MCCK
MCDA1
MCDA2
MCDA3
TWCK
(1)
, and EEPROM downloaded code size
PIO Line
PIOC14
PIOC0
PIOC1
PIOA1
PIOA0
PIOA2
PIOA3
PIOA0
PIOA1
PIOA2
PIOA4
PIOA5
PIOA6
PIOA8
A21
A22
6242E–ATARM–11-Sep09