AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 557

• Manufacturer Part Number: AT91SAM9261SB-CU-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 37-6. Data IN Transfer for Non Ping-pong Endpoint
37.5.2.4
Figure 37-7. Bank Swapping Data IN Transfer for Ping-pong Endpoints
557
USB Bus Packets
TXPKTRDY Flag
(UDP_CSRx)
TXCOMP Flag
(UDP_CSRx)
FIFO (DPR)
Content
AT91SAM9261S
Using Endpoints With Ping-pong Attribute
Set by the firmware
Data IN
PID
Microcontroller
1 st Data Payload
2 nd Data Payload
3 rd Data Payload
Prevous Data IN TX
Data IN 1
Interrupt Pending
The use of an endpoint with ping-pong attributes is necessary during isochronous transfer. This
also allows handling the maximum bandwidth defined in the USB specification during bulk trans-
fer. To be able to guarantee a constant or the maximum bandwidth, the microcontroller must
prepare the next data payload to be sent while the current one is being sent by the USB device.
Thus two banks of memory are used. While one is available for the microcontroller, the other
one is locked by the USB device.
When using a ping-pong endpoint, the following procedures are required to perform Data IN
transactions:
Cleared by Hw
Data IN 1
DPR access by the firmware
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
ACK
PID
Load In Progress
Write
Set by the firmware
Microcontroller Load Data in FIFO
USB Device
Data IN
PID
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Read
Read and Write at the Same Time
NAK
PID
Cleared by Firmware
Data IN
PID
DPR access by the hardware
USB Bus
Data is Sent on USB Bus
Data IN 2
2 nd Data Payload
3 rd Data Payload
1 st Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
Payload in FIFO
Data IN 2
Cleared by Hw
6242E–ATARM–11-Sep09
ACK
PID
Cleared by
Firmware
Interrupt
Pending