AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 568

• Manufacturer Part Number: AT91SAM9261SB-CU-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

37.6
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write
operations to the UDP registers including the UDP_TXVC register.
Table 37-4.
Notes:
568
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030 + 0x4 * ( ept_num - 1 )
0x050 + 0x4 * ( ept_num - 1 )
0x070
0x074
0x078 - 0xFC
USB Device Port (UDP) User Interface
1. Reset values are not defined for UDP_ISR.
2. See Warning above the
AT91SAM9261S
Register Mapping
Register
Frame Number Register
Global State Register
Function Address Register
Reserved
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Interrupt Clear Register
Reserved
Reset Endpoint Register
Reserved
Endpoint Control and Status Register
Endpoint FIFO Data Register
Reserved
Transceiver Control Register
Reserved
”Register Mapping”
on this page.
Name
UDP_FRM_NUM
UDP_GLB_STAT
UDP_FADDR
–
UDP_IER
UDP_IDR
UDP_IMR
UDP_ISR
UDP_ICR
–
UDP_RST_EP
–
UDP_CSR
UDP_FDR
–
UDP_TXVC
–
(2)
Access
Read-only
Read-write
Read-write
–
Write-only
Write-only
Read-only
Read-only
Write-only
–
Read-write
–
Read-write
Read-write
–
Read-write
–
6242E–ATARM–11-Sep09
Reset
0x0000_0000
0x0000_0000
0x0000_0100
–
0x0000_1200
–
–
0x0000_0000
–
0x0000_0000
0x0000_0000
–
0x0000_0000
–
(1)