AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 457

• Manufacturer Part Number: AT91SAM9261SB-CU-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

33.8
Table 33-4.
6242E–ATARM–11-Sep09
0x100- 0x124
0x50-0xFC
Offset
0x1C
0x2C
0x3C
0x4C
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0xC
0x0
0x4
0x8
Synchronous Serial Controller (SSC) User Interface
Register Mapping
Register
Control Register
Clock Mode Register
Reserved
Reserved
Receive Clock Mode Register
Receive Frame Mode Register
Transmit Clock Mode Register
Transmit Frame Mode Register
Receive Holding Register
Transmit Holding Register
Reserved
Reserved
Receive Sync. Holding Register
Transmit Sync. Holding Register
Receive Compare 0 Register
Receive Compare 1 Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for Peripheral Data Controller (PDC)
SSC_RCMR
SSC_RFMR
SSC_TCMR
SSC_RSHR
SSC_TFMR
SSC_TSHR
SSC_RC0R
SSC_RC1R
SSC_CMR
SSC_RHR
SSC_THR
SSC_IMR
SSC_IER
SSC_IDR
SSC_CR
SSC_SR
Name
–
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Access
AT91SAM9261S
–
–
–
–
–
–
0x000000CC
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–
457