AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 563

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AT91SAM9261SB-CU-999

Manufacturer Part Number
AT91SAM9261SB-CU-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9261SB-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, I2S, SPI, USB
Maximum Clock Frequency
190 MHz
Number Of Programmable I/os
96
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9261SB-CU-999
Manufacturer:
Atmel
Quantity:
10 000
37.5.2.9
37.5.2.10
37.5.2.11
563
AT91SAM9261S
Transmit Data Cancellation
Endpoints Without Dual-Banks
Endpoints With Dual-Banks
Some endpoints have dual-banks whereas some endpoints have only one bank. The procedure
to cancel transmission data held in these banks is described below.
To see the organization of dual-bank availability, refer to
Description”.
There are two possibilities: In one case, TXPKTRDY field in UDP_CSR has already been set. In
the other instance, TXPKTRDY is not set.
There are two possibilities: In one case, TXPKTRDY field in UDP_CSR has already been set. In
the other instance, TXPKTRDY is not set.
• TXPKTRDY is not set:
• TXPKTRDY has already been set:
• TXPKTRDY is not set:
• TXPKTRDY has already been set:
– Reset the endpoint to clear the FIFO (pointers). (See,
– Clear TXPKTRDY so that no packet is ready to be sent
– Reset the endpoint to clear the FIFO (pointers). (See,
– Reset the endpoint to clear the FIFO (pointers). (See,
– Clear TXPKTRDY and read it back until actually read at 0.
– Set TXPKTRDY and read it back until actually read at 1.
– Clear TXPKTRDY so that no packet is ready to be sent.
– Reset the endpoint to clear the FIFO (pointers). (See,
Endpoint
Endpoint
Endpoint
Endpoint
Register”.)
Register”.)
Register”.)
Register”.)
Section 37.6.9 ”UDP Reset
Section 37.6.9 ”UDP Reset
Section 37.6.9 ”UDP Reset
Section 37.6.9 ”UDP Reset
Table 37-1 ”USB Endpoint
6242E–ATARM–11-Sep09

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