UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 779

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
Condition for clearing (CLD = 0)
• When the SCL0 pin is at low level
• When IICE = 0 (operation stop)
• Reset
Condition for clearing (DAD = 0)
• When the SDA0 pin is at low level
• When IICE = 0 (operation stop)
• Reset
Digital filter can be used only in fast mode.
In fast mode, the transfer clock does not vary, regardless of the DFC bit being set (1) or cleared (0).
The digital filter is used for noise elimination in fast mode.
SMC
DAD
DFC
CLD
0
1
0
1
0
1
0
1
IICE: Bit 7 of IICA control register 0 (IICCTL0)
Figure 14-9. Format of IICA Control Register 1 (IICCTL1) (2/2)
The SCL0 pin was detected at low level.
The SCL0 pin was detected at high level.
The SDA0 pin was detected at low level.
The SDA0 pin was detected at high level.
Operates in standard mode.
Operates in fast mode.
Digital filter off.
Digital filter on.
CHAPTER 14 SERIAL INTERFACE IICA
User’s Manual U19678EJ1V1UD
Detection of SDA0 pin level (valid only when IICE = 1)
Detection of SCL0 pin level (valid only when IICE = 1)
Digital filter operation control
Operation mode switching
Condition for setting (CLD = 1)
• When the SCL0 pin is at high level
Condition for setting (DAD = 1)
• When the SDA0 pin is at high level
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