UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 439
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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7.5.8 Operation as A/D conversion trigger output function (type 1)
function described in 7.5.3 Operation as 6-phase PWM output function. The setting of the master channel is
therefore the same as in 7.5.3 Operation as 6-phase PWM output function. The A/D conversion trigger pulse
generation period can be calculated by the following expression.
the value of TDRm by using INTTMn of the master channel as a start trigger, and counts down. When TCRm has
become 0000H, TCRm outputs INTTMm and stops counting until the next start trigger (INTTMn of the master
channel) is input.
INTTMn generation).
The A/D conversion trigger output function uses two channels in combination to output A/D conversion triggers.
It outputs A/D conversion trigger signals from slave channels.
Multiple slave channels can be used to increase the number of A/D conversion trigger outputs.
The A/D conversion trigger output function assumes the master channel to be used as a sub-function of the
TCRn of the master channel operates in the interval timer mode and counts the periods.
TCRm of the slave channel operates in one-count mode and counts the duty. TCRm of the master channel loads
TDRn and TDRm of the master channel and slave channel become valid from the next period (master channel
Cautions 1. TSn or TSm cannot be set to “1” (forcible restart) while TEn = 1 or TEm = 1. If TSn or TSm is
Remarks 1.
A/D conversion trigger pulse generation period (interval from the start of the carrier period to INTTMn
detection)
= {Set value of TDRm (slave) + 1} × Count clock period
2.
3.
2. When using the A/D conversion trigger output function (type 1), set ATS1 to 0 and ATS0 to 1.
set to “1” while TEn = 1 or TEm = 1, the counter value (TCRn or TCRm) will be illegal and
TOn or TOm will not be able to output the expected waveform.
OPM = 0: n = 00, m = 08, 09
OPM = 1: n = 00, 04, m = 01, 05
OPM
ATS1, ATS0
CHAPTER 7 INVERTER CONTROL FUNCTIONS
: Bit 15 of TAU option mode register (OPMR)
: Bits 9 and 8 of TAU option mode register (OPMR)
User’s Manual U19678EJ1V1UD
437
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