UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 700
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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13.5.8
described in Figure 13-70.
698
Remark
Reads serial data register 0n (SDR0n).
Reads serial status register 0n (SSR0n).
Writes 1 to serial flag clear trigger
register 0n (SIR0n).
The procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10) communication is
Procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10)
communication
Software Manipulation
n: Channel number (n = 2 (78K0R/IB3 and 38-pin products of 78K0R/IC3), n = 0 to 2 (44-pin and 48-pin
products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3)).
Figure 13-70. Processing Procedure in Case of Overrun Error
The BFF0n bit of the SSR0n register is
set to 0 and channel n is enabled to
receive data.
Error flag is cleared.
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U19678EJ1V1UD
Hardware Status
This is to prevent an overrun error if the
next reception is completed during error
processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read from
the SSR0n register to the SIR0n register
without modification.
Remark
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