UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 251
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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40 MHz internal high-speed
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
Notes 1.
(Cautions are listed on the next page.)
<2> When the power supply voltage exceeds 1.61 V (TYP.), the reset is released and the internal high-speed
<3> CPU starts operation on the internal high-speed oscillation clock after a reset processing such as waiting for
<4> Set the start of oscillation of the X1 or XT1 clock
<5> When switching the CPU clock to the X1 or XT1 clock
Subsystem clock (f
oscillation clock (f
(when XT1 oscillation
(when X1 oscillation
Internal reset signal
Internal high-speed
oscillation clock (f
oscillator automatically starts oscillation.
the voltage of the power supply or regulator to stabilize has been performed after reset release.
oscillator and 5.6.4 Example of setting XT1 oscillator (products other than 78K0R/IB3)).
Switch to oscillation using the 40 MHz internal high-speed oscillation clock after setting DSCON bit to 1 by
using software.
set switching via software (see 5.6.3 Example of setting X1 oscillator and 5.6.4 Example of setting XT1
oscillator (products other than 78K0R/IB3)).
Switch to the 40 MHz internal high-speed oscillation clock by setting the DSCON bit (bit 0 of the 40 MHz
internal high-speed oscillation control register (DSCCTL)), waiting for 100
SELDSC bits to 1 by using software.
system clock (f
2.
3
selected
Power supply
voltage (V
High-speed
CPU clock
Figure 5-14. Clock Generator Operation When Power Supply Voltage Is Turned On
The internal reset processing time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
When releasing a reset, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC).
The 78K0R/IB3 doesn’t have the subsystem clock.
selected)
Note 3
IH40
SUB
0 V
DD
MX
IH
)
)
)
)
)
)
1.61 V
(TYP.)
<1>
0.5 V/ms
<2>
<3>
(MIN.)
Note 1
2.7 V
3.6 ms (MAX.)
Reset processing (about 2.1 to 5.8 ms)
is set by software.
CHAPTER 5 CLOCK GENERATOR
DSCON = 1
User’s Manual U19678EJ1V1UD
speed oscillation clock
8 MHz internal high-
<4>
40 MHz internal high-speed oscillation clock
oscillation stabilization time : 100 s
<5>
Note 3
is specified by software.
speed oscillation clock
Note 3
40 MHz internal high-
DSPO = 1, SELDSC = 1
Starting X1 oscillation
is specified by software.
Starting XT1 oscillation
via software (see 5.6.3 Example of setting X1
, wait for the clock oscillation to stabilize, and then
<4>
μ
Switched by
speed oscillation clock
software
8 MHz internal high-
<4>
X1 clock
oscillation stabilization time
μ
s, and then setting DSPO and
<5>
system clock
High-speed
Note 2
<5>
Subsystem
clock
249
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