UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 626

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

624
Address: F0122H, F0123H
Symbol
(8) Serial channel start register 0 (SS0)
SS0
SS0 register is a trigger register that is used to enable starting communication/count by each channel.
When 1 is written a bit of this register (SS0n), the corresponding bit (SE0n) of serial channel enable status
register 0 (SE0) is set to 1 (Operation is enabled). Because SS0n bit is a trigger bit, it is cleared immediately
when SE0n = 1.
SS0 register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of SS0 register can be set with an 1-bit or 8-bit memory manipulation instruction with SS0L.
Reset signal generation clears SS0 register to 0000H.
Note If a communication operation is already under execution, the operation is stopped.
Caution Be sure to clear bits 15 to 4 to “0”.
Remarks 1. n: Channel number (n = 0 to 3)
SS0n
15
0
1
0
2. When the SS0 register is read, 0000H is always read.
No trigger operation
Sets SE0n bit to 1 and enters the communication wait status
14
0
Figure 13-11. Format of Serial Channel Start Register 0 (SS0)
After reset: 0000H
13
0
12
0
CHAPTER 13 SERIAL ARRAY UNIT
11
0
User’s Manual U19678EJ1V1UD
R/W
10
0
Operation start trigger of channel n
9
0
8
0
7
0
Note
6
0
.
5
0
4
0
SS03 SS02 SS01 SS00
3
2
1
0