UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 469

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark A sampling error of less than the count clock period of slave channel 1 occurs, because the setting of TSn =
7.5.12 Operation as linked real-time output function (type 3)
channel 0 thinned the specified number of times as INTTMn of slave channel 1. By using this function, the TROm
value of slave channels 2 to 7 (the real-time output channels) can be output from TOm synchronized with INTTMn (a
signal that is INTTM00 of the master channel thinned the specified number of times). Unlike the linked real-time output
function (type 2), with this function, counting of INTTM00 can be started by a software trigger. After counting the
specified number of times, counting stops and the system waits for the next software trigger.
used as the real-time output trigger. The real-time output channel of slave channels 2 to 7 outputs the set value of
TROm from TOm by the real-time output trigger.
the count clock of slave channel 1. The interrupt generation cycle after having set TSn to 1 can be calculated by the
following expression.
time, INTTM00 is output by setting MD000 of TMR00 to “1”.
TDR00 again at the same timing. Similar operation is continued hereafter.
TCRn of slave channel 1 operates in one-count mode and generates a real-time output trigger. TCRn loads the value
of TDRn to TCRn and counts down according to the INTTM00 output of the master channel by using the setting of
TSn = 1 of slave channel 1 as the start trigger. When TCRn becomes 0000H, INTTMn will be output and counting will
be stopped until the next start trigger (TSn = 1) is input. When TSn is set to “1” for the second time while slave
channel 1 is operating (while TCRn is counting down), the second start trigger will be ignored. Set TSn to “1” after
INTTMn output. The setting values of TROn and TROm are output from TOn and TOm at the INTTMn output timing of
slave channel 1.
The linked real-time output function (type 3) includes a function to output a signal that is INTTM00 of master
If TRCn of the slave channel 1 is set to 1, INTTMn generated by the combination-operation with master channel is
This function starts a count operation by software manipulation (TSn) by using INTTM00 of the master channel as
The master channel operates in the interval timer mode and counts the periods.
TCR00 loads the value of TDR00 at the first count clock, after the channel start trigger bit (TS00) is set to 1. At this
Afterward, TCR00 counts down along with the count clock.
When TCR00 has become 0000H, INTTM00 is output upon the next count clock. TCR00 loads the value of
1 is held pending until the count clock generation of slave channel 1.
Period from setting TSn to “1” until INTTMn output
= (Set value of TDRn (slave 1) + 1) × Count clock period of slave 1
= (Set value of TDRn (slave 1) + 1) × (Set value of TDR00 (master) + 1) × Count clock period of master
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
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