UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 736
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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(Note and Remark are listed on the next page.)
734
Figure 13-93. Example of Contents of Registers for Address Field Transmission of Simplified I
(1) Register setting
SMR02
SCR02
SDR02
SOE0
SO0
SS0
(a) Serial mode register 02 (SMR02)
(b) Serial communication operation setting register 02 (SCR02)
(d) Serial output register 0 (SO0)
(e) Serial output enable register 0 (SOE0)
(f) Serial channel start register 0 (SS0) … Sets only the bits of the target channel is 1.
(c) Serial data register 02 (SDR02) (lower 8 bits: SIO10)
Operation clock (f
0: Prescaler output clock CK00 set by SPS0 register
1: Prescaler output clock CK01 set by SPS0 register
CKS02
TXE02
0/1
15
15
15
15
15
15
0
1
0
0
CCS02
RXE02
14
14
14
14
14
14
0
0
0
0
0
MCK
DAP02
13
13
13
13
13
13
0
0
0
0
0
) of channel 2
Setting of parity bit
00B: No parity
Baud rate setting
CKP02
12
12
12
12
12
12
0
0
0
0
0
11
11
11
11
11
11
0
0
1
0
0
CHAPTER 13 SERIAL ARRAY UNIT
EOC02
CKO02
0/1
10
10
10
10
10
10
0
0
0
0
User’s Manual U19678EJ1V1UD
PTC021
CKO01
×
Start condition is generated by manipulating the SO02 bit.
SOE02 = 0 until the start condition is generated, and SOE02 = 1
after generation.
9
0
9
0
9
9
9
0
9
0
Note
PTC020
CKO00
STS02
×
8
0
8
0
8
0
8
8
0
8
0
Note
DIR02
0
0
7
0
7
7
7
7
0
7
0
SIS020
0
0
0
6
6
6
0
0
6
6
6
Transmit data setting (address + R/W)
SLC021
5
1
5
0
5
0
0
0
5
5
5
SLC020
Interrupt sources of channel 2
0: Transfer end interrupt
1: Buffer empty interrupt
1
4
0
4
4
0
0
4
4
0
4
SIO10
SS03
Setting of stop bit
01B: Appending 1 bit (ACK)
3
0
3
0
1
3
3
3
0
3
×
MD022
DLS022
SOE02
SO02
SS02
0/1
0/1
0/1
1
2
2
1
2
2
2
2
MD021
DLS021
SOE01
SO01
×
×
SS01
0
1
1
1
1
1
1
1
×
Note
Note
2
C (IIC10) (1/2)
DLS020
MD020
SOE00
SO00
SS00
1
0
0
0
0
×
×
×
0
0
0
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