UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 417
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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detection).
detection).
2, 6 during an up status period.
Slave channels 2, 6
(up and down count mode)
Slave channels 3, 7
(one-count mode)
Master channels 0, 4
(interval timer mode)
The value of TDRp of slave channels 2, 6 becomes valid from the next carrier period (up and down trigger
The value of TDRq of slave channels 3, 7 becomes valid from the next start timing (dead time control trigger
Rewriting TDRq of slave channels 3, 7 is recommended to be performed after INTTMp detection of slave channels
Remark n = 00, 04
Figure 7-33. Block Diagram of Operation as Triangular Wave PWM Output Function with Dead Time
p = 02, 06
q = 03, 07
Operation clock
TSn
TSp
CK00
CK01
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
Timer data register p
Timer data register q
Timer data register n
register p (TCRp)
register q (TCRq)
register n (TCRn)
Timer counter
Timer counter
Timer counter
(TDRp)
(TDRn)
(TDRq)
controller
controller
controller
controller
controller
controller
Interrupt
Interrupt
Interrupt
Output
Output
Output
Interrupt signal
(INTTMn)
Interrupt signal
(INTTMp)
Interrupt signal
(INTTMq)
TOn pin
TOp pin
TOq pin
415
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