UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 601
UPD78F0551MA-FAA-AX
Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0551MA-FAA-AX.pdf
(822 pages)
Specifications of UPD78F0551MA-FAA-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 601 of 822
- Download datasheet (6Mb)
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
The first bit is directly latched by the SOTB1n register at the falling edge of the write signal of the SOTB1n register or
the read signal of the SIO1n register, and output from the SO1n pin via an output selector. Then, the value of the
SOTB1n register is transferred to the SIO1n register at the next falling (or rising) edge of SCK1n, and shifted one bit.
At the same time, the first bit of the receive data is stored in the SIO1n register via the SI1n pin.
The second and subsequent bits are latched by the SIO1n register to the output latch at the next rising (or falling)
edge of SCK1n, and the data is output from the SO1n pin.
Remark 78K0/KA2-L (25, 32-pin products):
78K0/KB2-L:
78K0/KC2-L:
Writing to SOTB1n or
Writing to SOTB1n or
reading from SIO1n
reading from SIO1n
Output latch
Output latch
SOTB1n
SOTB1n
SCK1n
SCK1n
SIO1n
SIO1n
SO1n
SO1n
Figure 16-17. Output Operation of First Bit (2/2)
(d) Type 4: CKP1n = 1, DAP1n = 1
(c) Type 2: CKP1n = 0, DAP1n = 1
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
n = 1
n = 0
n = 0, 1
First bit
First bit
2nd bit
2nd bit
3rd bit
3rd bit
587
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