UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 544
UPD78F0551MA-FAA-AX
Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0551MA-FAA-AX.pdf
(822 pages)
Specifications of UPD78F0551MA-FAA-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 544 of 822
- Download datasheet (6Mb)
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Remarks 1. Conform to the specifications of the product that is communicating, with respect to the transmission and
(3) Slave operation
The processing procedure of the slave operation is as follows.
2. To use the device as a master in a multi-master system, read the MSTS0 bit each time interrupt INTIICA0
3. To use the device as a slave in a multi-master system, check the status by using the IICAS0 and IICAF0
reception formats.
has occurred to check the arbitration result.
registers each time interrupt INTIICA0 has occurred, and determine the processing to be performed next.
No
No
EXC0 = 1 or COI0 = 1?
interrupt occurs?
interrupt occurs?
Slave operation
Transfer end?
MSTS0 = 1?
ACKD0 = 1?
MSTS0 = 1?
ACKD0 = 1?
Writing IICA
Writing IICA
TRC0 = 1?
WTIM0 = 1
INTIICA0
INTIICA0
STT0 = 1
Restart?
Figure 15-30. Master Operation in Multi-Master System (3/3)
C
C
2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
Starts communication
(specifies an address and transfer direction).
Starts transmission.
Waits for detection of ACK.
Waits for data transmission.
Does not participate
in communication.
SPT0 = 1
END
2
2
1
CHAPTER 15 SERIAL INTERFACE IICA
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
Transfer end?
Reading IICA
MSTS0 = 1?
MSTS0 = 1?
WREL0 = 1
ACKE0 = 1
WTIM0 = 0
ACKE0 = 0
INTIICA0
INTIICA0
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
Starts reception.
Waits for data reception.
Waits for detection of ACK.
2
2
530
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