UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 232

• Manufacturer Part Number: UPD78F0551MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0551MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Subsystem clock (f
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
Notes 1.
(when XT1 oscillation
<2> When the power supply voltage exceeds 1.61 V (TYP.), the reset is released and the internal high-speed
<3> When the power supply voltage rises with a slope of 0.5 V/ms (MIN.), the CPU starts operation on the internal
<4> Set the start of oscillation of the X1 or XT1 clock via software (refer to (1) in 5.6.1 Example of controlling high-
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
(when X1 oscillation
Internal high-speed
oscillation clock (f
Internal reset signal
system clock (f
Power supply
voltage (V
selected)
oscillator automatically starts oscillation.
high-speed oscillation clock after the reset is released and after the stabilization times for the voltage of the
power supply and regulator have elapsed, and then reset processing is performed.
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
switching via software (refer to (3) in 5.6.1 Example of controlling high-speed system clock and (3) in 5.6.3
Example of controlling subsystem clock).
High-speed
2.
3.
CPU clock
selected)
The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the internal
high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC). If the CPU operates on the high-speed system clock (X1
oscillation), set the oscillation stabilization time when releasing STOP mode using the oscillation
stabilization time select register (OSTS).
78K0/KC2-L only
Note 3
DD
SUB
0 V
XH
IH
Figure 5-16. Clock Generator Operation When Power Supply Voltage Is Turned On
)
)
)
)
<1>
(When LVI Default Start Function Stopped Is Set (Option Byte: LVISTART = 0))
1.61 V
(TYP.)
Waiting for oscillation
accuracy stabilization
(102 to 407 s)
<3>
Waiting for
voltage stabilization
<2>
0.5 V/ms
(0.93 to 3.7 ms)
(MIN.)
1.8 V
Note 1
Starting X1 oscillation
is set by software.
Starting XT1 oscillation
is set by software.
Internal high-speed oscillation clock
<4>
Reset processing (12 to 51 s)
oscillation stabilization time:
<4>
2
8
/f
X
X1 clock
to 2
18
/f
X
Note 2
<5>
High-speed system clock
CHAPTER 5 CLOCK GENERATOR
Switched by
software
<5>
Subsystem clock
Note 3
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