D12363VF33V Renesas Electronics America, D12363VF33V Datasheet - Page 661

IC H8S/2363 MCU ROMLESS 128QFP

D12363VF33V

Manufacturer Part Number
D12363VF33V
Description
IC H8S/2363 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12363VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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[3]
No
No
Read receive data in RDR, and
Clear ORER flag in SSR to 0
clear RDRF flag in SSR to 0
Read ORER flag in SSR
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Overrun error handling
All data received?
Start of reception
Error handling
Initialization
ORER = 1?
RDRF = 1?
Figure 14.19 Sample Serial Reception Flowchart
<End>
<End>
Yes
Yes
No
(Continued below)
Error processing
Section 14 Serial Communication Interface (SCI, IrDA)
Yes
[2]
[1]
[3]
[4]
[5]
Rev.6.00 Mar. 18, 2009 Page 601 of 980
[1]
[2] [3]
[4]
[5]
The RxD pin is automatically
designated as the receive data
input pin.
If a receive error occurs, read the
ORER flag in SSR, and after
performing the appropriate error
handling, clear the ORER flag to
0. Transfer cannot be resumed if
the ORER flag is set to 1.
SCI status check and receive
data read:
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
clear the RDRF flag to 0.
Transition of the RDRF flag from
0 to 1 can also be identified by
an RXI interrupt.
Serial reception continuation
procedure:
To continue serial reception,
before the MSB (bit 7) of the
current frame is received, finish
reading the RDRF flag, reading
RDR, and clearing the RDRF flag
to 0. The RDRF flag is cleared
automatically when the DMAC or
DTC is activated by a receive-
data-full interrupt (RXI) request
and the RDR value is read.
SCI initialization:
Receive error handling:
REJ09B0050-0600

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