D12363VF33V Renesas Electronics America, D12363VF33V Datasheet - Page 562

IC H8S/2363 MCU ROMLESS 128QFP

D12363VF33V

Manufacturer Part Number
D12363VF33V
Description
IC H8S/2363 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12363VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 11 Programmable Pulse Generator (PPG)
11.4.6
Figure 11.9 shows an example in which pulse output is used for four-phase complementary non-
overlapping pulse output.
1. Set up the TPU channel to be used as the output trigger channel so that TGRA and TGRB are
Rev.6.00 Mar. 18, 2009 Page 502 of 980
REJ09B0050-0600
output compare registers. Set the trigger period in TGRB and the non-overlap margin in
TGRA, and set the counter to be cleared by compare match B. Set the TGIEA bit in TIER to 1
to enable the TGIA interrupt.
Figure 11.9 Non-Overlapping Pulse Output Example (Four-Phase Complementary)
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
TGRB
TGRA
TCNT value
Example of Non-Overlapping Pulse Output (Example of Four-Phase
Complementary Non-Overlapping Output)
95
TCNT
00
95
65
05
Non-overlap margin
65
59
41
59
56
50
56
95
14
95
65
05
65
Time

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