D12363VF33V Renesas Electronics America, D12363VF33V Datasheet - Page 558
![IC H8S/2363 MCU ROMLESS 128QFP](/photos/12/40/124072/d12363vf33v_sml.jpg)
D12363VF33V
Manufacturer Part Number
D12363VF33V
Description
IC H8S/2363 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12363VF33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12363VF33V
Manufacturer:
ST
Quantity:
67 000
Company:
Part Number:
D12363VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
D12363VF33V
Manufacturer:
RENSAS
Quantity:
20 000
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Section 11 Programmable Pulse Generator (PPG)
11.4.3
Figure 11.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
1. Set up TGRA in TPU which is used as the output trigger to be an output compare register. Set
2. Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
3. The timer counter in the TPU channel starts. When compare match A occurs, the NDRH
4. Five-phase pulse output (one or two phases active at a time) can be obtained subsequently by
Rev.6.00 Mar. 18, 2009 Page 498 of 980
REJ09B0050-0600
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
a cycle in TGRA so the counter will be cleared by compare match A. Set the TGIEA bit in
TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the
next output data (H'C0) in NDRH.
writing H'40, H'60, H'20, H'30, H'10, H'18, H'08, H'88... at successive TGIA interrupts.
Example of Normal Pulse Output (Example of Five-Phase Pulse Output)
Figure 11.5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
30
10
10
18
18
08
08
88
88
80
80
C0
C0
40
Time
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