D12363VF33V Renesas Electronics America, D12363VF33V Datasheet - Page 496
![IC H8S/2363 MCU ROMLESS 128QFP](/photos/12/40/124072/d12363vf33v_sml.jpg)
D12363VF33V
Manufacturer Part Number
D12363VF33V
Description
IC H8S/2363 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12363VF33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12363VF33V
Manufacturer:
ST
Quantity:
67 000
Company:
Part Number:
D12363VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
D12363VF33V
Manufacturer:
RENSAS
Quantity:
20 000
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Section 10 16-Bit Timer Pulse Unit (TPU)
Note:
Rev.6.00 Mar. 18, 2009 Page 436 of 980
REJ09B0050-0600
Bit
1
0
*
Bit
Name
TGFB
TGFA
Only 0 can be written, for flag clearing.
Initial value
0
0
R/W
R/(W) *
R/(W) *
Description
Input Capture/Output Compare Flag B
Status flag that indicates the occurrence of TGRB
input capture or compare match.
[Setting conditions]
•
•
[Clearing conditions]
•
•
Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA
input capture or compare match.
[Setting conditions]
•
•
[Clearing conditions]
•
•
•
When TCNT = TGRB while TGRB is functioning
as output compare register
When TCNT value is transferred to TGRB by
input capture signal while TGRB is functioning
as input capture register
When DTC is activated by TGIB interrupt while
DISEL bit of MRB in DTC is 0
When 0 is written to TGFB after reading TGFB
= 1
When TCNT = TGRA while TGRA is functioning
as output compare register
When TCNT value is transferred to TGRA by
input capture signal while TGRA is functioning
as input capture register
When DTC is activated by TGIA interrupt while
DISEL bit of MRB in DTC is 0
When 0 is written to TGFA after reading TGFA
= 1
When DMAC is activated by TGIA interrupt
while DTE bit of DMABCR in DMAC is set to 1
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