MC9S12XA512CAG Freescale Semiconductor, MC9S12XA512CAG Datasheet - Page 149
![IC MCU 512K FLASH 144-LQFP](/photos/12/38/123875/mc9s12xa512cag_sml.jpg)
MC9S12XA512CAG
Manufacturer Part Number
MC9S12XA512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12XA512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale
Quantity:
490
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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4.3.2.14
The data port associated with the ATD is input-only. The port pins are shared with the analog A/D inputs
AN[15:8].
Read: Anytime
Write: Anytime, no effect
The A/D input channels may be used for general-purpose digital input.
Freescale Semiconductor
Function
PTAD[15:8]
Reset
Field
Pin
7:0
W
R
PTAD15
AN15
Port Data Register 0 (PORTAD0)
1
7
A/D Channel x (ANx) Digital Input Bits— If the digital input buffer on the ANx pin is enabled (IENx = 1) or
channel x is enabled as external trigger (ETRIGE = 1, ETRIGCH[3-0] = x, ETRIGSEL = 0) read returns the
logic level on ANx pin (signal potentials not meeting V
If the digital input buffers are disabled (IENx = 0) and channel x is not enabled as external trigger, read returns
a “1”.
Reset sets all PORTAD0 bits to “1”.
= Unimplemented or Reserved
PTAD14
AN14
1
6
Figure 4-16. Port Data Register 0 (PORTAD0)
Table 4-25. PORTAD0 Field Descriptions
PTAD13
MC9S12XDP512 Data Sheet, Rev. 2.21
AN13
1
5
PTAD12
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
AN12
1
4
Description
IL
PTAD11
or V
AN11
1
3
IH
specifications will have an indeterminate value)).
PTAD10
AN10
1
2
PTAD9
AN9
1
1
PTAD8
AN8
1
0
149
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