MC9S12XA512CAG Freescale Semiconductor, MC9S12XA512CAG Datasheet - Page 1203
![IC MCU 512K FLASH 144-LQFP](/photos/12/38/123875/mc9s12xa512cag_sml.jpg)
MC9S12XA512CAG
Manufacturer Part Number
MC9S12XA512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12XA512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale
Quantity:
490
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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29.3.2.7
The FCMD register is the Flash command register.
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
29.3.2.8
The FCTL register is the Flash control register.
All bits in the FCTL register are readable but are not writable.
The FCTL NV bits are loaded from the Flash nonvolatile byte located at global address 0x7F_FF0E during
the reset sequence, indicated by F in
Freescale Semiconductor
CMDB[6:0]
Reset
Reset
Field
6:0
W
W
R
R
Flash Command — Valid Flash commands are shown in
listed in
Flash Command Register (FCMD)
Flash Control Register (FCTL)
0
1
0
0
7
7
Table 29-16
= Unimplemented or Reserved
= Unimplemented or Reserved
NV6
1
F
6
6
Figure 29-12. Flash Command Register (FCMD)
sets the ACCERR flag in the FSTAT register.
Figure 29-13. Flash Control Register (FCTL)
Table 29-16. Valid Flash Command List
Table 29-15. FCMD Field Descriptions
CMDB[6:0]
MC9S12XDP512 Data Sheet, Rev. 2.21
0x05
0x06
0x20
0x40
0x41
0x47
NV5
Figure
F
0
5
5
29-13.
NV4
0
F
4
4
Sector Erase Abort
Description
NVM Command
Data Compress
Word Program
Sector Erase
Erase Verify
Mass Erase
CMDB
Table
NV3
Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
F
0
3
3
29-16. Writing any command other than those
NV2
0
F
2
2
NV1
F
0
1
1
NV0
0
F
0
0
1205
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