MC9S12XA512CAG Freescale Semiconductor, MC9S12XA512CAG Datasheet - Page 1038
![IC MCU 512K FLASH 144-LQFP](/photos/12/38/123875/mc9s12xa512cag_sml.jpg)
MC9S12XA512CAG
Manufacturer Part Number
MC9S12XA512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12XA512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale
Quantity:
490
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.1.4
A block diagram of the EEPROM module is shown in
25.2
The EEPROM module contains no signals that connect off-chip.
25.3
This section describes the memory map and registers for the EEPROM module.
25.3.1
The EEPROM memory map is shown in
memory addresses between global addresses 0x13_F800 and 0x13_FFFF. The EPROT register, described
in
EEPROM memory from accidental program or erase. The EEPROM addresses covered by this protectable
1040
Section 25.3.2.5, “EEPROM Protection Register
Command
Request
Oscillator
Clock
Interrupt
External Signal Description
Memory Map and Register Definition
Block Diagram
Module Memory Map
EETX2K
Clock
Divider
Command Pipeline
cmd2
addr2
data2
Figure 25-1. EETX2K Block Diagram
MC9S12XDP512 Data Sheet, Rev. 2.21
EEPROM
Registers
Protection
Interface
Figure
EECLK
cmd1
addr1
data1
25-2. The HCS12X architecture places the EEPROM
(EPROT)”, can be set to protect the upper region in the
Figure
25-1.
1K * 16 Bits
EEPROM
sector 511
sector 0
sector 1
Freescale Semiconductor
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