R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 76
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R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 46 of 583
6.2.7
Notes:
After Reset
1. The VW1C0 is enabled when the VCA26 bit in the VCA2 register is set to 1 (voltage detection 1 circuit enabled).
2. To use the voltage monitor 1 interrupt to exit stop mode and to return again, write 0 and then 1 to the VW1C1 bit.
3. Bits VW1C2 and VW1C3 are enabled when the VCA26 bit in the VCA2 register is set to 1(voltage detection 1
4. Set the VW1C2 bit to 0 by a program. When 0 is written by a program, this bit is set to 0 (and remains unchanged
5. The VW1C7 bit is enabled when the VCAC1 bit in the VCAC register is set to 0 (one edge). After setting the
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0039h
Symbol VW1C7
Set the VW1C0 bit to 0 (disabled) when the VCA26 bit is set to 0 (voltage detection 1 circuit disabled).
To set the VW0C0 bit to 1 (enabled), follow the procedure shown in Table 6.3 Procedure for Setting Bits
Associated with Voltage Monitor 1 Interrupt.
circuit enabled).
even if 1 is written to it).
VCAC1 bit to 0, set the VW1C7 bit.
Set the PRC3 bit in the PRCR register to 1 (write enabled) before writing the VW1C register.
Rewriting the VW1C register may set the VW1C2 bit to 1. Set the VW1C2 bit to 0 after rewriting the VW1C
register.
Bit
VW1C0 Voltage monitor 1 reset enable bit
VW1C1 Voltage monitor 0 digital filter
VW1C2 Voltage change detection flag
VW1C3 Voltage detection 1 signal monitor flag
VW1C7 Voltage monitor 1 reset
Symbol
VW1F0 Sampling clock select bit
VW1F1
Voltage Monitor 1 Circuit Control Register (VW1C)
—
Preliminary specification
Specifications in this manual are tentative and subject to change.
b7
1
disable mode select bit
Reserved bit
generation condition select bit
b6
—
0
Nov 05, 2008
VW1F1
Bit Name
b5
0
(2)
VW1F0
b4
0
(3, 4)
(5)
(1)
VW1C3
(3)
b3
1
0: Disabled
1: Enabled
0: Digital filter enabled mode
1: Digital filter disable mode
0: Not detected
1: Vdet1 passing detected
0: VCC
1: VCC
b5 b4
Set to 0.
0: When VCC reaches Vdet1 or above.
1: When VCC reaches Vdet1 or below.
0 0: fOCO-S divided by 1
0 1: fOCO-S divided by 2
1 0: fOCO-S divided by 4
1 1: fOCO-S divided by 8
(digital filter circuit enabled)
(digital filter circuit disabled)
or voltage detection 1 circuit disabled
VW1C2
b2
<
≥
0
Vdet1
Vdet1
VW1C1
b1
1
Function
VW1C0
6. Voltage Detection Circuit
b0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
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