R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 522

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324ANSP#U1

Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet

Specifications of R5F21324ANSP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21324ANSP#U1
Manufacturer:
Renesas Electronics America
Quantity:
135
Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 492 of 583
30.4.1
Notes:
1. The RDYSTI bit cannot be set to 1 (flash ready status interrupt request) by a program.
2. The BSYAEI bit cannot be set to 1 (flash access error interrupt request) by a program.
3. This bit is also set to 1 (error) when a command error occurs.
RDYSTI Bit (Flash Ready Status Flag Interrupt Request Flag)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01B2h
[Condition for setting to 0]
Set to 0 by an interrupt handling program.
[Condition for setting to 1]
When the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled) and auto-
programming or auto-erasure completes, or erase-suspend mode is entered, the RDYSTI bit is set to 1 (flash
ready status interrupt request).
During interrupt handling, set the RDYSTI bit to 0 (no flash ready status interrupt request).
When the flash memory status changes from busy to ready while the RDYSTIE bit in the FRMR0 register is set
to 1, the RDYSTI bit is set to 1.
The status is changed from busy to ready by the following operations: erasing/writing to the flash memory,
suspend acknowledgement, forcible termination, completion of the lock bit program, and completion of the
read lock bit status.
Symbol
LBDATA LBDATA monitor flag
RDYSTI Flash ready status interrupt request
BSYAEI Flash access error interrupt request
Symbol
Bit
FST4
FST5
FST6
FST7
Flash Memory Status Register (FST)
Preliminary specification
Specifications in this manual are tentative and subject to change.
FST7
b7
1
flag
flag
Program error flag
Erase error/blank check error flag
Erase-suspend status flag
Ready/busy status flag
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
(1)
(2)
FST6
b6
0
Nov 05, 2008
Bit Name
FST5
(3)
b5
0
FST4
b4
0
(3)
0: No flash ready status interrupt request
1: Flash ready status interrupt request
0: No flash access error interrupt request
1: Flash access error interrupt request
0: Locked
1: Not locked
0: No program error
1: Program error
0: No erase error/blank check error
1: Erase error/blank check error
0: Other than erase-suspend
1: During erase-suspend
0: Busy
1: Ready
b3
0
LBDATA
b2
X
BSYAEI
Function
b1
0
RDYSTI
b0
0
30. Flash Memory
R/W
R/W
R/W
R
R
R
R
R

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