R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 300
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 270 of 583
Figure 19.19
• TRCGRB register setting value greater than TRCGRA
register setting value
TRCMR register
TRCSR register
TRCSR register
TRCSR register
TRCIOB output
TSTART bit in
The above applies under the following conditions:
• The TOB bit in the TRCCR1 register is set to 0 (initial level is “L”, “H” output at compare match with the TRCGRC register, “L” output at compare
• Bits TCEG1 and TCEG0 in the TRCCR2 register are set to 00b (TRCTRG trigger input disabled).
IMFA bit in
IMFB bit in
IMFC bit in
match with the TRCGRB register).
TRC register value
0000h
Preliminary specification
Specifications in this manual are tentative and subject to change.
Operating Example of PWM2 Mode (Duty 0% and Duty 100%)
1
0
1
0
1
0
1
0
n
m
p
“L” initial
output
m+1
p+1
Nov 05, 2008
“H” output at TRCGRC register
compare match
Set to 0 by a
program
No compare match with
TRCGRB register, so
“H” output continues
• TRCGRC register setting value greater than TRCGRA
TRCMR register
TRCSR register
TRCSR register
TRCSR register
register setting value
TRCIOB output
TSTART bit in
IMFA bit in
IMFB bit in
IMFC bit in
m: TRCGRA register setting value
n: TRCGRB register setting value
p: TRCGRC register setting value
TRC register value
0000h
1
0
1
0
1
0
1
0
No compare match
with TRCGRC register,
so “L” output continues
p
m
n
“L” initial
output
m+1
n+1
“L” output at
TRCGRB register
compare match
with no change.
19. Timer RC
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