R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 117

• Manufacturer Part Number: R5F21324ANSP#U1
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Ar

Specifications of R5F21324ANSP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 87 of 583
8.
The bus cycles differ when accessing ROM/RAM and when accessing SFR.
Table 8.1 lists Bus Cycles by Access Area of R8C/32A Group (with Data Flash).
ROM/RAM and SFR are connected to the CPU by an 8-bit bus. When accessing in word (16-bit) units, these areas are
accessed twice in 8-bit units.
Table 8.2 shows Access Units and Bus Operations.
Table 8.1
Table 8.2
SFR/Data flash
Program ROM/RAM
Bus
Even address
Even address
Odd address
Word access
Word access
Odd address
Byte access
Byte access
Area
Preliminary specification
Specifications in this manual are tentative and subject to change.
Bus Cycles by Access Area of R8C/32A Group (with Data Flash)
Access Units and Bus Operations
Access Area
CPU clock
Address
Data
CPU clock
Address
Data
CPU clock
Address
Data
CPU clock
Address
Data
Nov 05, 2008
SFR, Data flash
Even
Odd
Data
Data
Even
Odd
2 cycles of CPU clock
1 cycle of CPU clock
Even + 1
Odd + 1
Data
Data
Data
Data
Bus Cycle
CPU clock
Address
Data
CPU clock
Address
Data
CPU clock
Address
Data
CPU clock
Address
Data
ROM (program ROM), RAM
Even
Even
Odd
Odd
Data
Data
Data
Data
Even + 1
Odd + 1
Data
Data
8. Bus