R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 127
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
Quantity
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 97 of 583
9.2.8
9.2.9
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0025h
Address 0028h
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the FRA2 register.
Symbol
Symbol
Symbol
Symbol
FRA20 High-speed on-chip oscillator frequency
FRA21
FRA22
CPSR
Bit
Bit
High-Speed On-Chip Oscillator Control Register 2 (FRA2)
Clock Prescaler Reset Flag (CPSRF)
—
—
—
—
—
—
—
—
—
—
—
—
Preliminary specification
Specifications in this manual are tentative and subject to change.
CPSR
b7
b7
—
0
0
switching bit
Reserved bits
Reserved bits
Clock prescaler reset flag
b6
b6
—
—
0
0
Nov 05, 2008
Bit Name
Bit Name
b5
—
b5
—
0
0
b4
b4
—
—
0
0
Set to 0.
Setting this bit to 1 initializes the clock prescaler.
(When read, the content is 0)
b3
b3
—
—
0
0
Division selection
These bits select the division ratio for the high-
speed on-chip oscillator clock.
b2 b1 b0
Set to 0.
0 0 0: Divide-by-2 mode
0 0 1: Divide-by-3 mode
0 1 0: Divide-by-4 mode
0 1 1: Divide-by-5 mode
1 0 0: Divide-by-6 mode
1 0 1: Divide-by-7 mode
1 1 0: Divide-by-8 mode
1 1 1: Divide-by-9 mode
FRA22
b2
b2
—
0
0
Function
FRA21
Function
b1
b1
—
0
0
9. Clock Generation Circuit
FRA20
b0
b0
—
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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