ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 98

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

On-chip peripherals
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Input capture
In this section, the index, i, may be 1 or 2 because there are 2 input capture functions in the
16-bit timer.
The two input-capture 16-bit registers (IC1R and IC2R) are used to latch the value of the
free-running counter after a transition detected by the ICAPi pin.
Table 45.
ICiR register is a read-only register.
The active transition is software-programmable through the IEDGi bit of Control Registers
(CRi).
The timing resolution is one count of the free-running counter: (
Procedure:
To use the input capture function, select the following in the CR2 register:
●
●
And select the following in the CR1 register:
●
●
When an input capture occurs:
●
●
●
Clearing the Input Capture interrupt request (i.e. clearing the ICFi bit) is done in two steps:
1.
2.
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi will never
be set until the ICiLR register is also read.
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
The 2 input capture functions can be used together even if the timer also uses the 2 output
compare functions.
In One-pulse Mode and PWM mode only the input capture 2 can be used.
The alternate inputs (ICAP1 & ICAP2) are always directly connected to the timer. So any
transitions on these pins activate the input capture function.
Select the timer clock (CC[1:0]) (see
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input).
Set the ICIE bit to generate an interrupt after an input capture coming from either the
ICAP1 pin or the ICAP2 pin
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input).
ICFi bit is set.
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
Reading the SR register while the ICFi bit is set.
An access (read or write) to the ICiLR register.
ICiR
ICiR register
Figure
Doc ID 12321 Rev 5
48).
MS Byte
ICiHR
Table 50: Clock control bits on page
f
CPU
/
ST72344xx ST72345xx
CC[1:0]).
LS Byte
ICiLR
110).