ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 182

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

On-chip peripherals
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I2C slave 1 address register (I2C3SSAR1)
Reset value: 0000 0000 (00h)
Bits 7:1 = ADDR[7:1] Address of Slave 1
Bit 0= EN1 Enable bit for Slave Address 1
I2C slave 2 address register (I2C3SSAR2)
Reset value: 0000 0000 (00h)
Bits 7:1 = ADDR[7:1] Address of Slave 2.
Bit 0= EN2 Enable bit for Slave Address 2
I2C slave 3 address register (I2C3SSAR3)
Reset value: 0000 0000 (00h)
Bit 7:1 = ADDR[7:1] Address of Slave 3
Bit 0= EN3 Enable bit for Slave Address 3
7
ADDR7
ADDR7
ADDR7
This register contains the first 7 bits of Slave 1 address (excluding the LSB) and is user
programmable. It is also cleared by hardware when interface is disabled (PE =0).
This bit is used to enable/disable Slave Address 1. It is also cleared by hardware when
interface is disabled (PE =0).
0: Slave Address 1 disabled
1: Slave Address 1 enabled
This register contains the first 7 bits of Slave 2 address (excluding the LSB) and is user
programmable. It is also cleared by hardware when interface is disabled (PE =0).
This bit is used to enable/disable Slave Address 2. It is also cleared by hardware when
interface is disabled (PE =0).
0: Slave Address 2 disabled
1: Slave Address 2 enabled
This register contains the first 7 bits of Slave 3 address (excluding the LSB) and is user
programmable. It is also cleared by hardware when interface is disabled (PE =0).
This bit is used to enable/disable Slave Address 3. It is also cleared by hardware when
interface is disabled (PE =0).
0: Slave Address 3 disabled
1: Slave Address 3 enabled
7
7
ADDR6
ADDR6
ADDR6
ADDR5
ADDR5
ADDR5
Doc ID 12321 Rev 5
ADDR4
ADDR4
ADDR4
Read / Write
Read / Write
Read / Write
ADDR3
ADDR3
ADDR3
ADDR2
ADDR2
ADDR2
ST72344xx ST72345xx
ADDR1
ADDR1
ADDR1
0
EN1
EN2
EN3
0
0