ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 172

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

On-chip peripherals
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Figure 74. 16-bit word read operation flowchart
Application note
Taking full advantage of its higher interrupt priority Slave 3 can be used to allow the
addressing master to send data bytes as commands to the ST7. These commands can be
decoded by the ST7 software to perform various operations such as programming the Data
E2PROM via IAP (In-Application Programming).
Slave 3 writes the command byte and other data in the RAM and generates an interrupt.
The ST7 then decodes the command and processes the data as decoded from the
command byte. The ST7 also writes a status byte in the RAM which the addressing master
can poll.
Address handling
As soon as a start condition is detected, the address is received from the SDA line and sent
to the shift register. Then it is compared with the three addresses of the interface to decode
which slave of the interface is being addressed.
Address not matched: the interface ignores it and waits for another Start condition.
Repeat
Byte-Pair Coherency ensured by setting Word Mode + DMA on Words
RAM start address depends on slave address
Sends read address
Stop condition
Sends address
Receives byte 1
Receives byte 2
and read bit
Host
Updates status + DMA CNTL
Decodes I2C3SNS address
Updates current address-
Shadow reg => Shift reg
Reads 1 word from RAM
Byte 2 => Shadow reg
completes word write
Doc ID 12321 Rev 5
Byte 1 => Shift reg
Issues DMA request
Delays while CPU
Decodes R/W bit
Releases DMA
ST7 I2C3SNS
Resets read flag
Sets read flag
register
Word mode?
STOP?
N
Y
Y
N
Reads I2C3SNS status register
Services I2C3SNS interrupt
Resumes execution
Normal execution
Halts execution
ST7 CPU
ST72344xx ST72345xx
3 cycles
max