ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 77

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

ST72344xx ST72345xx
Caution:
Table 28.
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
The alternate function must not be activated as long as the pin is configured as input with
interrupt, in order to avoid generating spurious interrupts.
Analog alternate function
When the pin is used as an ADC input, the I/O must be configured as floating input. The
analog multiplexer (controlled by the ADC registers) switches the analog voltage present on
the selected pin to the common analog rail which is connected to the ADC input.
reading the DR register will read the alternate function output status.
the alternate function reads the pin status given by the DR register content.
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
I/O port configurations
PAD
PAD
PAD
V
V
DD
R
DD
R
V
PU
PU
DD
R
PU
Doc ID 12321 Rev 5
Hardware configuration
PULL-UP
CONDITION
INTERRUPT
CONDITION
ALTERNATE
ALTERNATE
ENABLE
ENABLE
REGISTER
DR
DR REGISTER ACCESS
EXTERNAL INTERRUPT
SOURCE (ei
REGISTER
REGISTER
DR
DR
DR REGISTER ACCESS
DR REGISTER ACCESS
W
R
ALTERNATE
ALTERNATE
x
OUTPUT
OUTPUT
)
R/W
R/W
ALTERNATE INPUT
ANALOG INPUT
DATA BUS
DATA BUS
DATA BUS
I/O ports
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